[PATCH] [MIPS] PR82981 - mulditi3 pattern for MIPS64R6
Mihailo Stojanovic
mihailo.stojanovic@rt-rk.com
Mon Oct 21 11:24:00 GMT 2019
This expands the existing MIPS mulditi3 pattern by adding support for
MIPS64R6 multiplication instructions.
gcc/ChangeLog:
* config/mips/mips.md (<u>mulditi3): Generate patterns for high
doubleword and low doubleword result of multiplication on
MIPS64R6.
gcc/testsuite/ChangeLog:
* gcc.target/mips/mips64r6-ti-mult.c: New test.
---
Not sure if I should add "PR target/82981" above the ChangeLog entries,
as there was already one patch which addressed the issue, but didn't
resolve it completely.
---
gcc/config/mips/mips.md | 15 ++++++++++++---
gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c | 16 ++++++++++++++++
2 files changed, 28 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 4ad5c62..658f5e6 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2464,9 +2464,11 @@
[(set (match_operand:TI 0 "register_operand")
(mult:TI (any_extend:TI (match_operand:DI 1 "register_operand"))
(any_extend:TI (match_operand:DI 2 "register_operand"))))]
- "ISA_HAS_DMULT && !(<CODE> == ZERO_EXTEND && TARGET_FIX_VR4120)"
+ "ISA_HAS_R6DMUL
+ || (ISA_HAS_DMULT
+ && !(<CODE> == ZERO_EXTEND && TARGET_FIX_VR4120))"
{
- rtx hilo;
+ rtx hilo, hi, lo;
if (TARGET_MIPS16)
{
@@ -2476,9 +2478,16 @@
}
else if (TARGET_FIX_R4000)
emit_insn (gen_<u>mulditi3_r4000 (operands[0], operands[1], operands[2]));
- else
+ else if (ISA_HAS_DMULT)
emit_insn (gen_<u>mulditi3_internal (operands[0], operands[1],
operands[2]));
+ else
+ {
+ hi = mips_subword (operands[0], 1);
+ lo = mips_subword (operands[0], 0);
+ emit_insn (gen_muldi3_mul3_nohilo (lo, operands[1], operands[2]));
+ emit_insn (gen_<su>muldi3_highpart_r6 (hi, operands[1], operands[2]));
+ }
DONE;
})
diff --git a/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c b/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c
new file mode 100644
index 0000000..f969e76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mabi=64 -march=mips64r6" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } } */
+
+typedef unsigned __int128 u128;
+typedef unsigned long long u64;
+
+u128
+test (u64 a, u64 b)
+{
+ return (u128)a * (u128)b;
+}
+
+/* { dg-final { scan-assembler-not "__multi3" } } */
+/* { dg-final { scan-assembler "dmul" } } */
+/* { dg-final { scan-assembler "dmuhu" } } */
--
2.7.4
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