[PATCH target/86811] Mark VAX as not needing speculation barriers

[Maciej W. Rozycki]

On Thu, 3 Oct 2019, Segher Boessenkool wrote:

> >  I don't think this is right.  As I have just mentioned in a related 
> > discussion elsewhere, the NVAX and NVAX+ implementations include a branch 
> > predictor in their microarchitecture[1], so obviously they do execute 
> > speculatively.  I think this change would best be reverted and the issue 
> > further investigated.
> > 
> > References:
> > 
> > [1] G. Michael Uhler et al, "The NVAX and NVAX+ High-performance VAX
> >     Microprocessors", Digital Technical Journal Vol. 4 No. 3 Summer 1992
> >     <ftp://ftp.linux-mips.org/pub/linux/mips/people/macro/DEC/DTJ/DTJ701/DTJ701PF.PDF>
> 
> As that article explains, the NVAX does *not* execute speculatively.  You
> can have branch prediction without speculative execution just fine.  It
> is beneficial, too, because this hides the fetch latency when a branch is
> predicted correctly.
> 
> When a (conditional) branch executes, it is detected if the branch was
> mispredicted, and if so it (and everything after it) is flushed.  This is
> similar to how it was done on the PowerPC 6xx CPUs, or on the original
> Pentium, etc.

 OK, I stand corrected.  For the sake of my enlightenment, do you 
specifically refer to this statement:

"If the I-box predicts incorrectly, the E-box invokes a trap mechanism to 
drain the pipeline and restart the I-box at the alternate PC."

(page 5, section "The I-box") or something else?

  Maciej