[PATCH] [MIPS] Prevent MSA branches from being put into delay slots

[Jeff Law]

On 11/15/19 10:27 AM, Dragan Mladjenovic wrote:
> From: "Dragan Mladjenovic" <dmladjenovic@wavecomp.com>
> 
>  This patch tightens the instruction definitions to make sure
>  that MSA branch instructions cannot be put into delay slots and have their
>  delay slots eligible for being filled. Also, MSA *div*3 patterns use MSA
>  branches for zero checks but are not marked as being multi instruction and
>  thus could be put into delay slots. This patch fixes that.
> 
>  Testcase only covers if MSA branch delay slot is being filled.
> 
> gcc/ChangeLog:
> 
> 2019-11-15  Zoran Jovanovic <zoran.jovanovic@mips.com>
> 		Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
> 
> 	* config/mips/mips-msa.md (msa_<msabr>_<msafmt_f>, msa_<msabr>_v_<msafmt_f>):
> 	Mark as not having "likely" version.
> 	* config/mips/mips.md (insn_count): The simd_div instruction with
> 	TARGET_CHECK_ZERO_DIV consists of 3 instructions.
> 	(can_delay): Exclude simd_branch.
> 	(defile_delay *): Add simd_branch instructions.
> 	They have one regular delay slot.
OK
jeff