[PATCH v2 4/6] arm, aarch64: Add support for __GCC_ASM_FLAG_OUTPUTS__
Richard Henderson
richard.henderson@linaro.org
Thu Nov 14 15:09:00 GMT 2019
On 11/14/19 3:39 PM, Richard Earnshaw (lists) wrote:
> Not had a chance to look at this in detail, but I don't see any support for
>
> 1) Thumb1 where we do not expose the condition codes at all
> 2) Thumb2 where we need IT instructions along-side the conditional instructions
> themselves.
>
> How have you tested this for those targets?
I tested aarch64-linux and arm-elf-eabi (I'm currently 8 time zones away from
my arm-linux-eabihf box, so using sim).
I didn't know about the thumb1 restriction. I had assumed somehow that we'd
just use branch insns to form whatever cstore* is required. I suppose it's
easy enough to generate an error/sorry for asm-flags in thumb1 mode.
As for thumb2, correct behaviour comes from the existing cstore* patterns, and
the testsuite need not check for IT specifically because unified asm syntax
says that the insns that are conditional under the IT should still bear the
conditions themselves.
I presume I can test both of these cases with arm-elf-eabi + -mthumb{1,2}?
r~
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