[PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscall function
Kyrill Tkachov
kyrylo.tkachov@foss.arm.com
Tue Nov 12 10:19:00 GMT 2019
Hi Mihail,
On 10/23/19 10:26 AM, Mihail Ionescu wrote:
> [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscall function
>
> Hi,
>
> === Context ===
>
> This patch is part of a patch series to add support for Armv8.1-M
> Mainline Security Extensions architecture. Its purpose is to generate
> inline callee-saved register clearing when calling a function with the
> cmse_nonsecure_call attribute with the ultimate goal of having the whole
> call sequence inline.
>
> === Patch description ===
>
> Besides changing the set of registers that needs to be cleared inline,
> this patch also generates the push and pop to save and restore
> callee-saved registers without trusting the callee inline. To make the
> code more future-proof, this (currently) Armv8.1-M specific behavior is
> expressed in terms of clearing of callee-saved registers rather than
> directly based on the targets.
>
> The patch contains 1 subtlety:
>
> Debug information is disabled for push and pop because the
> REG_CFA_RESTORE notes used to describe popping of registers do not stack.
> Instead, they just reset the debug state for the register to the one at
> the beginning of the function, which is incorrect for a register that is
> pushed twice (in prologue and before nonsecure call) and then popped for
> the first time. In particular, this occasionally trips CFI note creation
> code when there are two codepaths to the epilogue, one of which does not
> go through the nonsecure call. Obviously this mean that debugging
> between the push and pop is not reliable.
>
> ChangeLog entries are as follows:
>
> *** gcc/ChangeLog ***
>
> 2019-10-23Â Mihail-Calin Ionescu <mihail.ionescu@arm.com>
> 2019-10-23Â Thomas Preud'homme <thomas.preudhomme@arm.com>
>
> Â Â Â Â Â Â Â * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
> Â Â Â Â Â Â Â (cmse_nonsecure_call_clear_caller_saved): Rename into ...
> Â Â Â Â Â Â Â (cmse_nonsecure_call_inline_register_clear): This. Save and clear
> Â Â Â Â Â Â Â callee-saved GPRs as well as clear ip register before doing a
> nonsecure
> Â Â Â Â Â Â Â call then restore callee-saved GPRs after it when targeting
> Â Â Â Â Â Â Â Armv8.1-M Mainline.
> Â Â Â Â Â Â Â (arm_reorg): Adapt to function rename.
>
> *** gcc/testsuite/ChangeLog ***
>
> 2019-10-23Â Mihail-Calin Ionescu <mihail.ionescu@arm.com>
> 2019-10-23Â Thomas Preud'homme <thomas.preudhomme@arm.com>
>
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/cmse-1.c: Add check for PUSH and POP and
> update
> Â Â Â Â Â Â Â CLRM check.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/cmse-14.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c:
> Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/softfp/union-1.c: Likewise.
> Â Â Â Â Â Â Â * gcc.target/arm/cmse/mainline/8_1m/softfp/union-2.c: Likewise.
>
> Testing: bootstrapped on arm-linux-gnueabihf and testsuite shows no
> regression.
>
> Is this ok for trunk?
>
This is ok.
I think you should get commit access to GCC by now.
Please fill in the form at https://sourceware.org/cgi-bin/pdw/ps_form.cgi
listing me as the approver (using my details from the MAINTAINERS file).
Of course, only commit this once the whole series is approved ;)
Thanks,
Kyrill
> Best regards,
>
> Mihail
>
>
> ###############    Attachment also inlined for ease of reply  Â
> ###############
>
>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index
> fca10801c87c5e635d573c0fbdc47a1ae229d0ef..12b4b42a66b0c5589690d9a2d8cf8e42712ca2c0
> 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -187,6 +187,7 @@ static int arm_memory_move_cost (machine_mode,
> reg_class_t, bool);
> Â static void emit_constant_insn (rtx cond, rtx pattern);
> Â static rtx_insn *emit_set_insn (rtx, rtx);
> Â static rtx emit_multi_reg_push (unsigned long, unsigned long);
> +static void arm_emit_multi_reg_pop (unsigned long);
> Â static int arm_arg_partial_bytes (cumulative_args_t,
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â const function_arg_info &);
> Â static rtx arm_function_arg (cumulative_args_t, const
> function_arg_info &);
> @@ -17810,13 +17811,13 @@ cmse_clear_registers (sbitmap
> to_clear_bitmap, uint32_t *padding_bits_to_clear,
> Â Â Â Â }
> Â }
>
> -/* Clears caller saved registers not used to pass arguments before a
> -  cmse_nonsecure_call. Saving, clearing and restoring of callee saved
> -Â Â registers is done in __gnu_cmse_nonsecure_call libcall.
> -  See libgcc/config/arm/cmse_nonsecure_call.S. */
> +/* Clear core and caller-saved VFP registers not used to pass
> arguments before
> +  a cmse_nonsecure_call. Saving, clearing and restoring of VFP
> callee-saved
> +  registers is done in the __gnu_cmse_nonsecure_call libcall. See
> +  libgcc/config/arm/cmse_nonsecure_call.S. */
>
> Â static void
> -cmse_nonsecure_call_clear_caller_saved (void)
> +cmse_nonsecure_call_inline_register_clear (void)
> Â {
> Â Â basic_block bb;
>
> @@ -17826,8 +17827,15 @@ cmse_nonsecure_call_clear_caller_saved (void)
>
> Â Â Â Â Â Â FOR_BB_INSNS (bb, insn)
> Â Â Â Â Â Â Â Â {
> -Â Â Â Â Â Â Â Â unsigned address_regnum, regno, maxregno =
> -Â Â Â Â Â Â Â Â Â Â TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : NUM_ARG_REGS - 1;
> +Â Â Â Â Â Â Â Â bool clear_callee_saved = TARGET_HAVE_FPCXT_CMSE;
> +Â Â Â Â Â Â Â Â unsigned long callee_saved_mask
> +Â Â Â Â Â Â Â Â Â Â = ((1 << (LAST_HI_REGNUM + 1)) - 1)
> +Â Â Â Â Â Â Â Â Â Â & ~((1 << (LAST_ARG_REGNUM + 1)) - 1);
> +Â Â Â Â Â Â Â Â unsigned address_regnum, regno;
> +Â Â Â Â Â Â Â Â unsigned max_int_regno
> +Â Â Â Â Â Â Â Â Â Â = clear_callee_saved ? IP_REGNUM : LAST_ARG_REGNUM;
> +Â Â Â Â Â Â Â Â unsigned maxregno
> +Â Â Â Â Â Â Â Â Â Â = TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : max_int_regno;
> Â Â Â Â Â Â Â Â Â Â auto_sbitmap to_clear_bitmap (maxregno + 1);
> Â Â Â Â Â Â Â Â Â Â rtx_insn *seq;
> Â Â Â Â Â Â Â Â Â Â rtx pat, call, unspec, clearing_reg, ip_reg, shift;
> @@ -17859,9 +17867,11 @@ cmse_nonsecure_call_clear_caller_saved (void)
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â || XINT (unspec, 1) != UNSPEC_NONSECURE_MEM)
> Â Â Â Â Â Â Â Â Â Â Â Â continue;
>
> -        /* Determine the caller-saved registers we need to clear. */
> +        /* Mark registers that needs to be cleared. Those that holds a
> +           parameter are removed from the set further below. */
> Â Â Â Â Â Â Â Â Â Â bitmap_clear (to_clear_bitmap);
> -Â Â Â Â Â Â Â Â bitmap_set_range (to_clear_bitmap, R0_REGNUM, NUM_ARG_REGS);
> +Â Â Â Â Â Â Â Â bitmap_set_range (to_clear_bitmap, R0_REGNUM,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â max_int_regno - R0_REGNUM + 1);
>
> Â Â Â Â Â Â Â Â Â Â /* Only look at the caller-saved floating point registers
> in case of
>              -mfloat-abi=hard. For -mfloat-abi=softfp we will be
> using the
> @@ -17883,7 +17893,7 @@ cmse_nonsecure_call_clear_caller_saved (void)
> Â Â Â Â Â Â Â Â Â Â gcc_assert (MEM_P (address));
> Â Â Â Â Â Â Â Â Â Â gcc_assert (REG_P (XEXP (address, 0)));
> Â Â Â Â Â Â Â Â Â Â address_regnum = REGNO (XEXP (address, 0));
> -Â Â Â Â Â Â Â Â if (address_regnum < R0_REGNUM + NUM_ARG_REGS)
> +Â Â Â Â Â Â Â Â if (address_regnum <= max_int_regno)
> Â Â Â Â Â Â Â Â Â Â Â Â bitmap_clear_bit (to_clear_bitmap, address_regnum);
>
> Â Â Â Â Â Â Â Â Â Â /* Set basic block of call insn so that df rescan is
> performed on
> @@ -17943,6 +17953,15 @@ cmse_nonsecure_call_clear_caller_saved (void)
> Â Â Â Â Â Â Â Â Â Â shift = gen_rtx_ASHIFT (SImode, clearing_reg, const1_rtx);
> Â Â Â Â Â Â Â Â Â Â emit_insn (gen_rtx_SET (clearing_reg, shift));
>
> +Â Â Â Â Â Â Â Â if (clear_callee_saved)
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â rtx push_insn =
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â emit_multi_reg_push (callee_saved_mask,
> callee_saved_mask);
> +Â Â Â Â Â Â Â Â Â Â Â Â /* Disable frame debug info in push because it needs to be
> +               disabled for pop (see below). */
> +Â Â Â Â Â Â Â Â Â Â Â Â RTX_FRAME_RELATED_P (push_insn) = 0;
> +Â Â Â Â Â Â Â Â Â Â }
> +
> Â Â Â Â Â Â Â Â Â Â /* Clear caller-saved registers that leak before doing a
> non-secure
>              call. */
> Â Â Â Â Â Â Â Â Â Â ip_reg = gen_rtx_REG (SImode, IP_REGNUM);
> @@ -17952,6 +17971,36 @@ cmse_nonsecure_call_clear_caller_saved (void)
> Â Â Â Â Â Â Â Â Â Â seq = get_insns ();
> Â Â Â Â Â Â Â Â Â Â end_sequence ();
> Â Â Â Â Â Â Â Â Â Â emit_insn_before (seq, insn);
> +
> +Â Â Â Â Â Â Â Â if (TARGET_HAVE_FPCXT_CMSE)
> +Â Â Â Â Â Â Â Â Â Â {
> +Â Â Â Â Â Â Â Â Â Â Â Â rtx_insn *next, *pop_insn, *after = insn;
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â start_sequence ();
> +Â Â Â Â Â Â Â Â Â Â Â Â arm_emit_multi_reg_pop (callee_saved_mask);
> +Â Â Â Â Â Â Â Â Â Â Â Â pop_insn = get_last_insn ();
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â /* Disable frame debug info in pop because they reset
> the state
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â of popped registers to what it was at the beginning
> of the
> +               function, before the prologue. This leads to
> incorrect state
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â when doing the pop after the nonsecure call for
> registers that
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â are pushed both in prologue and before the nonsecure
> call.
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â It also occasionally triggers an assert failure in
> CFI note
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â creation code when there are two codepaths to the
> epilogue,
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â one of which does not go through the nonsecure call.
> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Obviously this mean that debugging between the push
> and pop is
> +               not reliable. */
> +Â Â Â Â Â Â Â Â Â Â Â Â RTX_FRAME_RELATED_P (pop_insn) = 0;
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â end_sequence ();
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â emit_insn_after (pop_insn, after);
> +
> +Â Â Â Â Â Â Â Â Â Â Â Â /* Skip pop we have just inserted after nonsecure call,
> we know
> +               it does not contain a nonsecure call. */
> +Â Â Â Â Â Â Â Â Â Â Â Â insn = pop_insn;
> +Â Â Â Â Â Â Â Â Â Â }
> Â Â Â Â Â Â Â Â }
> Â Â Â Â }
> Â }
> @@ -18257,7 +18306,7 @@ arm_reorg (void)
> Â Â Mfix * fix;
>
> Â Â if (use_cmse)
> -Â Â Â cmse_nonsecure_call_clear_caller_saved ();
> +Â Â Â cmse_nonsecure_call_inline_register_clear ();
>
> Â Â /* We cannot run the Thumb passes for thunks because there is no
> CFG. */
> Â Â if (cfun->is_thunk)
> diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c
> b/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c
> index
> 29d78ddd6166321bdf0acabf011138b276151e85..9f36fa3b1d8b86b4e1827909fca4fee181ba1c61
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c
> @@ -109,7 +109,9 @@ qux (int_nsfunc_t * callback)
> Â /* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, ip, APSR\}" {
> target arm_cmse_clear_ok } } } */
> Â /* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" {
> target arm_cmse_clear_ok } } } */
> Â /* { dg-final { scan-assembler "msr\tAPSR_nzcvq" { target { !
> arm_cmse_clear_ok } } } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" {
> target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" { target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" { target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" { target arm_cmse_clear_ok } } } */
>
> Â int call_callback (void)
> Â {
> diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c
> b/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c
> index
> 1f5af7c2dba7747f6058d12af8ef80b4dd1b1431..6d39afab44329e78a8ff2f693fd94fe6a501af5a
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c
> @@ -9,6 +9,8 @@ int foo (void)
> Â Â return bar ();
> Â }
>
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" {
> target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" { target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" { target arm_cmse_clear_ok } } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" { target arm_cmse_clear_ok } } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> Â /* { dg-final { scan-assembler-not "^(.*\\s)?bl?\[^\\s]*\\s+bar" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c
> index
> c52e1c14d9956743625e3b8a200e823f163924e3..d4caf513ed2153370369bddbfcf6d2568d9f2f1e
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c
> @@ -12,5 +12,7 @@
> Â /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c
> index
> fdba955a32fc5ad492b74974185f98470bc49a7e..2b7655a2c9971fb0aad4e6c8a1fee72e21028fad
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c
> @@ -10,5 +10,7 @@
> Â /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c
> index
> 85068ceaac6a5c0c60af4a54c0af0d20326fc18d..1a62076df9d6831d06f5ac6bdcb7deed0ecd23f8
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c
> @@ -13,5 +13,7 @@
> Â /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c
> index
> af69d38acf47d9d1d55480edba2b66f07e2d06ad..1319ac9766bcd330f6d8f0f7754a64a1dcc105b1
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c
> @@ -10,5 +10,7 @@
> Â /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c
> index
> 62201595549f07b046c7c5972d612ab155c4c38c..9bb60175529d77a3b1868f62a5a4d5355f00b76b
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c
> @@ -13,5 +13,7 @@
> Â /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c
> index
> 287f0d6faad113fbc8c30051280668baa58ab130..11ca78bfdaf1ebe09f9699c278dc3db4fd20768c
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c
> @@ -7,5 +7,7 @@
> Â /* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, r5, r6, r7, r8,
> r9, r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c
> index
> 68f9e2254c97d7b9817f24cb4dc4315dc876fb26..2f14c52715e0ad6e6ab69b01713ee13985a22653
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c
> @@ -17,4 +17,7 @@
> Â /* { dg-final { scan-assembler "and\tr3, r3, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r5, r6, r7, r8, r9, r10, fp,
> ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c
> index
> 9719f799229e245264d377c3726190ca768ca1dd..67ced090163bc4b40c09b00305d49d21084f7fb8
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c
> @@ -8,12 +8,14 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s1, VPR\}" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s4-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c
> index
> a6951d34afeed54c0ac2e937345cbfbbfb2c4b2d..a6d9d14b63be8a226242512e36ba313849a3d35a
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c
> @@ -8,8 +8,10 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s0-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c
> index
> 23db88dc66d584acbba64a10d3f6fd06f066b321..ff4763529c7d280193d99ef695ce426038b7ceb9
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c
> @@ -8,10 +8,12 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts1, #1\.0" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s2-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c
> index
> 2898efabb2b37e3c8dacaf029b5a40be8edcc624..952010baee36cc404f1a85252c3bf9da7a6c3ce1
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c
> @@ -8,7 +8,8 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f64\td1, #1\.0" } } */
> @@ -16,6 +17,7 @@
> Â /* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s1, VPR\}" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s4-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c
> index
> a4520a9166e36b1d3220befb72a1863799b2f424..ec1284117f8937026b263ba1bd623e9942527877
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c
> @@ -8,8 +8,10 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s0-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c
> index
> c79d3188026d9248abde7967671c05a09b75c49f..d70a58a4c84c5d042f4efefbf36316d5401f770c
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c
> @@ -8,9 +8,11 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */
> Â /* { dg-final { scan-assembler "vscclrm\t\{s2-s15, VPR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c
> index
> d43a9f85a199ecdf7e018852b3af9b4cf36af81f..07a6719b4f1a260a3461f7408e278dd6e71f60d3
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c
> @@ -10,7 +10,9 @@
> Â /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr2, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr3, r4" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r1, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r1, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov" } } */
> Â /* { dg-final { scan-assembler-not "vmsr" } } */
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c
> index
> 02e48157a2c61b0a8bee77e949944acc2a4bee37..ca2961ac18ccacec6907b1d1d217c6c2e28072e7
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c
> @@ -7,7 +7,9 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov" } } */
> Â /* { dg-final { scan-assembler-not "vmsr" } } */
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c
> index
> c7a22a2ba464dce26b289635dd8dcc8213ae33d8..7a1abb51fcf9a62a24583e792953845f21bbed49
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c
> @@ -9,7 +9,9 @@
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler-not "vmov" } } */
> Â /* { dg-final { scan-assembler-not "vmsr" } } */
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c
> index
> d34ca383236fdd31723966e6218ea918cf8c9122..90aadffb7aa14ceeea22232148c11e9543eee0e7
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c
> @@ -8,7 +8,9 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c
> index
> ff8e9816cff1569bbfc1c5213c1f8ed2e49ba250..28f2e86dfaa89902d1c04fc2890c5445b5bb0af5
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c
> @@ -10,7 +10,9 @@
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c
> index
> ff9a7dfa5e696e3a6c4132343d0ee94c3068c208..15d3b682c798dd6635ed6b90d9aa8e705fefa265
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c
> @@ -11,7 +11,9 @@
> Â /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr2, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr3, r4" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r1, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r1, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c
> index
> 03d36aa650986b6069e2fe1c1f3f98fa9664d88a..3d48859028ab8dd22d9ffed7c95ece59c2ed937e
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c
> @@ -8,7 +8,9 @@
> Â /* Checks for saving and clearing prior to function call. */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7,
> r8, r9, r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git
> a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c
> index
> ce45e10688f855ca7b2a63777d2b3d3418815589..0e2dcae36927d2c7187ca2b60c935504268476bc
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c
> @@ -10,7 +10,9 @@
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */
> Â /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
>
> Â /* Now we check that we use the correct intrinsic to call. */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c
> index
> dbd1d34413ef36f2b03716c0d9cf46b024af0835..43e58ebde56ceb229edca2db25b720c42207c100
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c
> @@ -10,5 +10,7 @@
> Â /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9,
> r10, fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
> diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c
> b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c
> index
> 3edc7f1e259779a24e722d67ed544c0a673090c7..6adf8fae5c3a56a6e50278919a2edbd2fda58f42
> 100644
> --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c
> +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c
> @@ -14,5 +14,7 @@
> Â /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
> Â /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
> Â /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
> -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */
> +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10,
> fp, ip, APSR\}" } } */
> +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10,
> fp\}" } } */
> Â /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
>
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