[RS6000] Fix typos
Alan Modra
amodra@gmail.com
Tue Mar 26 05:29:00 GMT 2019
Applying as obvious.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Correct
rs6000_vector_mem init. Correct wI and wJ comment.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f132c3a27c8..03c91432bff 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3050,7 +3050,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
below. */
gcc_assert ((int)VECTOR_NONE == 0);
memset ((void *) &rs6000_vector_unit[0], '\0', sizeof (rs6000_vector_unit));
- memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_unit));
+ memset ((void *) &rs6000_vector_mem[0], '\0', sizeof (rs6000_vector_mem));
gcc_assert ((int)CODE_FOR_nothing == 0);
memset ((void *) ®_addr[0], '\0', sizeof (reg_addr));
@@ -3204,8 +3204,8 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p)
wy - Register class to do ISA 2.07 SF operations.
wz - Float register if we can do 32-bit unsigned int loads.
wH - Altivec register if SImode is allowed in VSX registers.
- wI - VSX register if SImode is allowed in VSX registers.
- wJ - VSX register if QImode/HImode are allowed in VSX registers.
+ wI - Float register if SImode is allowed in VSX registers.
+ wJ - Float register if QImode/HImode are allowed in VSX registers.
wK - Altivec register if QImode/HImode are allowed in VSX registers. */
if (TARGET_HARD_FLOAT)
--
Alan Modra
Australia Development Lab, IBM
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