[PATCH 05/30] Changes to arm
Richard Earnshaw
Richard.Earnshaw@foss.arm.com
Wed Jun 26 08:59:00 GMT 2019
On 25/06/2019 21:22, acsawdey@linux.ibm.com wrote:
> From: Aaron Sawdey <acsawdey@linux.ibm.com>
>
> * config/arm/arm-protos.h: Change movmem to cpymem in names.
> * config/arm/arm.c (arm_movmemqi_unaligned, arm_gen_movmemqi,
> gen_movmem_ldrd_strd, thumb_expand_movmemqi) Change movmem to cpymem.
> * config/arm/arm.md (movmemqi): Change movmem to cpymem.
OK.
R.
> ---
> gcc/config/arm/arm-protos.h | 6 +++---
> gcc/config/arm/arm.c | 18 +++++++++---------
> gcc/config/arm/arm.md | 8 ++++----
> gcc/config/arm/thumb1.md | 4 ++--
> 4 files changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
> index 485bc68..bf2bf1c 100644
> --- a/gcc/config/arm/arm-protos.h
> +++ b/gcc/config/arm/arm-protos.h
> @@ -126,8 +126,8 @@ extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
> extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
> extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
> extern bool valid_operands_ldrd_strd (rtx *, bool);
> -extern int arm_gen_movmemqi (rtx *);
> -extern bool gen_movmem_ldrd_strd (rtx *);
> +extern int arm_gen_cpymemqi (rtx *);
> +extern bool gen_cpymem_ldrd_strd (rtx *);
> extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
> extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
> HOST_WIDE_INT);
> @@ -203,7 +203,7 @@ extern void thumb2_final_prescan_insn (rtx_insn *);
> extern const char *thumb_load_double_from_address (rtx *);
> extern const char *thumb_output_move_mem_multiple (int, rtx *);
> extern const char *thumb_call_via_reg (rtx);
> -extern void thumb_expand_movmemqi (rtx *);
> +extern void thumb_expand_cpymemqi (rtx *);
> extern rtx arm_return_addr (int, rtx);
> extern void thumb_reload_out_hi (rtx *);
> extern void thumb_set_return_address (rtx, rtx);
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index e3e71ea..820502a 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -14385,7 +14385,7 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length,
> core type, optimize_size setting, etc. */
>
> static int
> -arm_movmemqi_unaligned (rtx *operands)
> +arm_cpymemqi_unaligned (rtx *operands)
> {
> HOST_WIDE_INT length = INTVAL (operands[2]);
>
> @@ -14422,7 +14422,7 @@ arm_movmemqi_unaligned (rtx *operands)
> }
>
> int
> -arm_gen_movmemqi (rtx *operands)
> +arm_gen_cpymemqi (rtx *operands)
> {
> HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
> HOST_WIDE_INT srcoffset, dstoffset;
> @@ -14436,7 +14436,7 @@ arm_gen_movmemqi (rtx *operands)
> return 0;
>
> if (unaligned_access && (INTVAL (operands[3]) & 3) != 0)
> - return arm_movmemqi_unaligned (operands);
> + return arm_cpymemqi_unaligned (operands);
>
> if (INTVAL (operands[3]) & 3)
> return 0;
> @@ -14570,7 +14570,7 @@ arm_gen_movmemqi (rtx *operands)
> return 1;
> }
>
> -/* Helper for gen_movmem_ldrd_strd. Increase the address of memory rtx
> +/* Helper for gen_cpymem_ldrd_strd. Increase the address of memory rtx
> by mode size. */
> inline static rtx
> next_consecutive_mem (rtx mem)
> @@ -14585,7 +14585,7 @@ next_consecutive_mem (rtx mem)
> /* Copy using LDRD/STRD instructions whenever possible.
> Returns true upon success. */
> bool
> -gen_movmem_ldrd_strd (rtx *operands)
> +gen_cpymem_ldrd_strd (rtx *operands)
> {
> unsigned HOST_WIDE_INT len;
> HOST_WIDE_INT align;
> @@ -14629,7 +14629,7 @@ gen_movmem_ldrd_strd (rtx *operands)
>
> /* If we cannot generate any LDRD/STRD, try to generate LDM/STM. */
> if (!(dst_aligned || src_aligned))
> - return arm_gen_movmemqi (operands);
> + return arm_gen_cpymemqi (operands);
>
> /* If the either src or dst is unaligned we'll be accessing it as pairs
> of unaligned SImode accesses. Otherwise we can generate DImode
> @@ -26395,7 +26395,7 @@ thumb_call_via_reg (rtx reg)
>
> /* Routines for generating rtl. */
> void
> -thumb_expand_movmemqi (rtx *operands)
> +thumb_expand_cpymemqi (rtx *operands)
> {
> rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
> rtx in = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
> @@ -26404,13 +26404,13 @@ thumb_expand_movmemqi (rtx *operands)
>
> while (len >= 12)
> {
> - emit_insn (gen_movmem12b (out, in, out, in));
> + emit_insn (gen_cpymem12b (out, in, out, in));
> len -= 12;
> }
>
> if (len >= 8)
> {
> - emit_insn (gen_movmem8b (out, in, out, in));
> + emit_insn (gen_cpymem8b (out, in, out, in));
> len -= 8;
> }
>
> diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
> index ae58217..a7fa410 100644
> --- a/gcc/config/arm/arm.md
> +++ b/gcc/config/arm/arm.md
> @@ -7250,7 +7250,7 @@
> ;; We could let this apply for blocks of less than this, but it clobbers so
> ;; many registers that there is then probably a better way.
>
> -(define_expand "movmemqi"
> +(define_expand "cpymemqi"
> [(match_operand:BLK 0 "general_operand" "")
> (match_operand:BLK 1 "general_operand" "")
> (match_operand:SI 2 "const_int_operand" "")
> @@ -7262,12 +7262,12 @@
> if (TARGET_LDRD && current_tune->prefer_ldrd_strd
> && !optimize_function_for_size_p (cfun))
> {
> - if (gen_movmem_ldrd_strd (operands))
> + if (gen_cpymem_ldrd_strd (operands))
> DONE;
> FAIL;
> }
>
> - if (arm_gen_movmemqi (operands))
> + if (arm_gen_cpymemqi (operands))
> DONE;
> FAIL;
> }
> @@ -7277,7 +7277,7 @@
> || INTVAL (operands[2]) > 48)
> FAIL;
>
> - thumb_expand_movmemqi (operands);
> + thumb_expand_cpymemqi (operands);
> DONE;
> }
> "
> diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
> index cefd6cf..b199349 100644
> --- a/gcc/config/arm/thumb1.md
> +++ b/gcc/config/arm/thumb1.md
> @@ -928,7 +928,7 @@
>
> ;; Thumb block-move insns
>
> -(define_insn "movmem12b"
> +(define_insn "cpymem12b"
> [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
> (mem:SI (match_operand:SI 3 "register_operand" "1")))
> (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
> @@ -950,7 +950,7 @@
> (set_attr "type" "store_12")]
> )
>
> -(define_insn "movmem8b"
> +(define_insn "cpymem8b"
> [(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
> (mem:SI (match_operand:SI 3 "register_operand" "1")))
> (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
>
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