[PATCH] [RS6000] Change maddld match_operand from DI to GPR
Mon Jun 24 08:02:00 GMT 2019
On Mon, Jun 24, 2019 at 03:43:26PM +0800, Kewen.Lin wrote:
> on 2019/6/24 ä¸å3:19, Segher Boessenkool wrote:
> > Newer ISAs require 64-bit to be implemented. There are no optional
> > 64-bit categories anymore. Since this instruction is enabled for P9
> > (ISA 3.0) only (that's the TARGET_MODULO), it's fine.
> > What you are saying is quite true for older CPUs/ISAs though: there you
> > have to make sure you are targetting a CPU that supports the 64-bit
> > categories, before using any 64-bit insns.
> > But those days are gone :-)
> Good to know that, thanks a lot for the information! It's fine then.
> It sounds like we can have a clean up for some others like
> TARGET_EXTSWSLI. :)
Yes, but be careful there! The insn patterns for this use DImode, which
does not mean the same thing without -mpowerpc64 (it's a register pair
then, not what you want).
And it doesn't make much sense to allow this for SImode as well (using
GPR, perhaps), because the insn just is a shift left for SImode, and we
already have shift left instructions.
So we might want to just directly say "TARGET_MODULO && TARGET_POWERPC64"
in those patterns (TARGET_MODULO is a funny way of saying "p9 or later").
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