[PATCH] RX: Add rx-*-linux target

Yoshinori Sato ysato@users.sourceforge.jp
Sun Jun 2 11:27:00 GMT 2019


On Fri, 31 May 2019 09:16:18 +0900,
Jeff Law wrote:
> 
> On 5/29/19 12:27 PM, Jeff Law wrote:
> > On 5/23/19 6:05 AM, Yoshinori Sato wrote:
> >> I ported linux kernel to Renesas RX.
> >>
> >> rx-*-elf target output a binary different from the standard ELF.
> >> It has the same format as the Renesas compiler.
> >>
> >> But the linux kernel requires the standard ELF format.
> >> I want to define a rx-*-linux target so that I can generate
> >> a standard ELF binary.
> > Presumably you're resubmitting after your assignment got recorded (I
> > think I saw that fly by recently).
> > 
> > I'll construct a ChangeLog and install this on the trunk.
> So this is causing libgcc to fail to build for rx-elf.  The problem is
> the DF=SF #define.  I think you need so split that out so that it's only
> used for rx-linux.
> 
> Jeff

OK. fix it.
I tried build rx-elf target. it success.

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7122c8ed1c8..b547ab1d1cb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2799,6 +2799,11 @@ rl78-*-elf*)
 rx-*-elf*)
 	tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
 	tmake_file="${tmake_file} rx/t-rx"
+	extra_options="${extra_options} rx/elf.opt"
+	;;
+rx-*-linux*)
+	tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h ../../libgcc/config/rx/rx-abi.h"
+	tmake_file="${tmake_file} rx/t-linux"
 	;;
 s390-*-linux*)
 	tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h"
diff --git a/gcc/config/rx/elf.opt b/gcc/config/rx/elf.opt
new file mode 100644
index 00000000000..907e030df8e
--- /dev/null
+++ b/gcc/config/rx/elf.opt
@@ -0,0 +1,44 @@
+; Command line options for the Renesas RX port of GCC.
+; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
+; Contributed by Red Hat.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+;---------------------------------------------------
+
+; elf target extra options
+
+msim
+Target
+Use the simulator runtime.
+
+;---------------------------------------------------
+
+mas100-syntax
+Target Mask(AS100_SYNTAX) Report
+Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatable syntax.
+
+;---------------------------------------------------
+
+mint-register=
+Target RejectNegative Joined UInteger Var(rx_interrupt_registers) Init(0)
+Specifies the number of registers to reserve for interrupt handlers.
+
+;---------------------------------------------------
+
+msave-acc-in-interrupts
+Target Mask(SAVE_ACC_REGISTER)
+Specifies whether interrupt functions should save and restore the accumulator register.
diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h
new file mode 100644
index 00000000000..df3fdd41092
--- /dev/null
+++ b/gcc/config/rx/linux.h
@@ -0,0 +1,231 @@
+/* GCC backend definitions for the rx-linux
+   Copyright (C) 2019 Yoshinori Sato
+   Based on rx.h
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+
+#include "config/rx/rx.h"
+
+#undef TARGET_CPU_CPP_BUILTINS
+#define TARGET_CPU_CPP_BUILTINS()               \
+  do                                            \
+    {                                           \
+      builtin_define ("__RX__"); 		\
+      builtin_assert ("cpu=RX"); 		\
+      if (rx_cpu_type == RX610)			\
+        builtin_assert ("machine=RX610");	\
+     else					\
+        builtin_assert ("machine=RX600");	\
+						\
+      if (TARGET_BIG_ENDIAN_DATA)		\
+	builtin_define ("__RX_BIG_ENDIAN__");	\
+      else					\
+	builtin_define ("__RX_LITTLE_ENDIAN__");\
+						\
+      if (TARGET_64BIT_DOUBLES)			\
+	builtin_define ("__RX_64BIT_DOUBLES__");\
+      else					\
+	builtin_define ("__RX_32BIT_DOUBLES__");\
+						\
+      if (ALLOW_RX_FPU_INSNS)			\
+	builtin_define ("__RX_FPU_INSNS__");	\
+						\
+    }                                           \
+  while (0)
+
+#undef  CC1_SPEC
+#define CC1_SPEC "\
+  %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
+
+#undef  ASM_SPEC
+#define ASM_SPEC "\
+%{mbig-endian-data:-mbig-endian-data} \
+%{m64bit-doubles:-m64bit-doubles} \
+%{!m64bit-doubles:-m32bit-doubles} \
+%{msmall-data-limit*:-msmall-data-limit} \
+%{mrelax:-relax} \
+"
+
+#undef DATA_SECTION_ASM_OP
+#define DATA_SECTION_ASM_OP	      			\
+   "\t.section .data,\"aw\",@progbits\n\t.p2align 2"
+
+#undef SDATA_SECTION_ASM_OP
+#define SDATA_SECTION_ASM_OP	      			\
+   "\t.section .data2,\"aw\",@progbits\n\t.p2align 1"
+
+#undef  READONLY_DATA_SECTION_ASM_OP
+#define READONLY_DATA_SECTION_ASM_OP  			\
+   "\t.section .rodata,\"a\",@progbits\n\t.p2align 2"
+
+#undef BSS_SECTION_ASM_OP
+#define BSS_SECTION_ASM_OP	      			\
+   "\t.section .bss\n\t.p2align 2"
+
+#undef SBSS_SECTION_ASM_OP
+#define SBSS_SECTION_ASM_OP	      			\
+   "\t.section .bss2\n\t.p2align 1"
+
+/* The following definitions are conditional depending upon whether the
+   compiler is being built or crtstuff.c is being compiled by the built
+   compiler.  */
+#undef TEXT_SECTION_ASM_OP
+#define TEXT_SECTION_ASM_OP	      \
+  "\t.section .text,\"ax\""
+#undef CTORS_SECTION_ASM_OP
+#define CTORS_SECTION_ASM_OP	      \
+  "\t.section\t.init_array,\"aw\",@init_array"
+#undef DTORS_SECTION_ASM_OP
+#define DTORS_SECTION_ASM_OP	      \
+  "\t.section\t.fini_array,\"aw\",@fini_array"
+#undef INIT_ARRAY_SECTION_ASM_OP
+#define INIT_ARRAY_SECTION_ASM_OP   \
+  "\t.section\t.init_array,\"aw\",@init_array"
+#undef FINI_ARRAY_SECTION_ASM_OP
+#define FINI_ARRAY_SECTION_ASM_OP   \
+  "\t.section\t.fini_array,\"aw\",@fini_array"
+
+#undef GLOBAL_ASM_OP
+#define GLOBAL_ASM_OP		"\t.global\t"
+#undef  USER_LABEL_PREFIX
+
+#undef ASM_OUTPUT_ALIGN
+#define ASM_OUTPUT_ALIGN(STREAM, LOG)		\
+  do						\
+    {						\
+      if ((LOG) == 0)				\
+        break;					\
+      fprintf (STREAM, "\t.balign %d\n", 1 << (LOG));	\
+    }						\
+  while (0)
+
+#undef ASM_OUTPUT_ADDR_VEC_ELT
+#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
+  fprintf (FILE, "\t.long .L%d\n", VALUE)
+
+/* This is how to output an element of a case-vector that is relative.
+   Note: The local label referenced by the "1b" below is emitted by
+   the tablejump insn.  */
+
+#undef ASM_OUTPUT_ADDR_DIFF_ELT
+#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
+  fprintf (FILE, "\t.long .L%d - 1b\n", VALUE)
+
+#undef ASM_OUTPUT_SIZE_DIRECTIVE
+#define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE)			\
+  do									\
+    {									\
+      HOST_WIDE_INT size_ = (SIZE);					\
+									\
+      fputs (SIZE_ASM_OP, STREAM);					\
+      assemble_name (STREAM, NAME);					\
+      fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_);	\
+    }									\
+  while (0)
+
+#undef ASM_OUTPUT_MEASURED_SIZE
+#define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME)				\
+  do									\
+    {									\
+      fputs (SIZE_ASM_OP, STREAM);					\
+      assemble_name (STREAM, NAME);					\
+      fputs (", .-", STREAM);						\
+      assemble_name (STREAM, NAME);					\
+      putc ('\n', STREAM);						\
+    }									\
+  while (0)
+
+#undef ASM_OUTPUT_TYPE_DIRECTIVE
+#define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE)			\
+  do									\
+    {									\
+      fputs (TYPE_ASM_OP, STREAM);					\
+      assemble_name (STREAM, NAME);					\
+      fputs (", ", STREAM);						\
+      fprintf (STREAM, TYPE_OPERAND_FMT, TYPE);				\
+      putc ('\n', STREAM);						\
+    }									\
+  while (0)
+
+#undef  ASM_GENERATE_INTERNAL_LABEL
+#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)		\
+  do								\
+    {								\
+      sprintf (LABEL, "*.%s%u", PREFIX, (unsigned) (NUM));			\
+    }								\
+  while (0)
+
+#undef  ASM_OUTPUT_EXTERNAL
+#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)			\
+  do								\
+    {								\
+      default_elf_asm_output_external (FILE, DECL, NAME);	\
+    }								\
+  while (0)
+
+#undef  ASM_OUTPUT_ALIGNED_COMMON
+#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)		\
+  do									\
+    {									\
+      fprintf ((FILE), "%s", COMMON_ASM_OP);				\
+      assemble_name ((FILE), (NAME));					\
+      fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED ",%u\n",	\
+	       (SIZE), (ALIGN) / BITS_PER_UNIT);			\
+    }									\
+  while (0)
+
+#undef  SKIP_ASM_OP
+#define SKIP_ASM_OP   "\t.zero\t"
+
+#undef  ASM_OUTPUT_LIMITED_STRING
+#define ASM_OUTPUT_LIMITED_STRING(FILE, STR)		\
+  do							\
+    {							\
+      const unsigned char *_limited_str =		\
+	(const unsigned char *) (STR);			\
+      unsigned ch;					\
+							\
+      fprintf ((FILE), "\t.string\t\"");		\
+							\
+      for (; (ch = *_limited_str); _limited_str++)	\
+        {						\
+	  int escape;					\
+							\
+	  switch (escape = ESCAPES[ch])			\
+	    {						\
+	    case 0:					\
+	      putc (ch, (FILE));			\
+	      break;					\
+	    case 1:					\
+	      fprintf ((FILE), "\\%03o", ch);		\
+	      break;					\
+	    default:					\
+	      putc ('\\', (FILE));			\
+	      putc (escape, (FILE));			\
+	      break;					\
+	    }						\
+        }						\
+							\
+      fprintf ((FILE), "\"\n");				\
+    }							\
+  while (0)
+
+#undef  PREFERRED_DEBUGGING_TYPE
+
+#undef TARGET_AS100_SYNTAX
+#define TARGET_AS100_SYNTAX 0
diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
index f70e8f34004..0695f3b6538 100644
--- a/gcc/config/rx/rx.c
+++ b/gcc/config/rx/rx.c
@@ -1438,10 +1438,14 @@ bit_count (unsigned int x)
   return (x + (x >> 16)) & 0x3f;
 }
 
+#if defined(TARGET_SAVE_ACC_REGISTER)
 #define MUST_SAVE_ACC_REGISTER			\
   (TARGET_SAVE_ACC_REGISTER			\
    && (is_interrupt_func (NULL_TREE)		\
        || is_fast_interrupt_func (NULL_TREE)))
+#else
+#define MUST_SAVE_ACC_REGISTER 0
+#endif
 
 /* Returns either the lowest numbered and highest numbered registers that
    occupy the call-saved area of the stack frame, if the registers are
diff --git a/gcc/config/rx/rx.h b/gcc/config/rx/rx.h
index b50b48f8afb..672e087cd13 100644
--- a/gcc/config/rx/rx.h
+++ b/gcc/config/rx/rx.h
@@ -408,7 +408,9 @@ typedef unsigned int CUMULATIVE_ARGS;
 #define GLOBAL_ASM_OP 		\
   (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
 #define ASM_COMMENT_START	" ;"
+#undef ASM_APP_ON
 #define ASM_APP_ON		""
+#undef ASM_APP_OFF
 #define ASM_APP_OFF 		""
 #define LOCAL_LABEL_PREFIX	"L"
 #undef  USER_LABEL_PREFIX
diff --git a/gcc/config/rx/rx.opt b/gcc/config/rx/rx.opt
index 50814a17a75..4e80c860e43 100644
--- a/gcc/config/rx/rx.opt
+++ b/gcc/config/rx/rx.opt
@@ -82,18 +82,6 @@ Maximum size of global and static variables which can be placed into the small d
 
 ;---------------------------------------------------
 
-msim
-Target
-Use the simulator runtime.
-
-;---------------------------------------------------
-
-mas100-syntax
-Target Mask(AS100_SYNTAX) Report
-Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatible syntax.
-
-;---------------------------------------------------
-
 mrelax
 Target
 Enable linker relaxation.
diff --git a/gcc/config/rx/t-linux b/gcc/config/rx/t-linux
new file mode 100644
index 00000000000..0975b2690dc
--- /dev/null
+++ b/gcc/config/rx/t-linux
@@ -0,0 +1,34 @@
+# Makefile fragment for building GCC for the rx-linux.
+# Copyright (C) 2019 Yoshinori Sato
+# Based on t-rx
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Enable multilibs:
+
+MULTILIB_OPTIONS    =
+MULTILIB_DIRNAMES   =
+
+MULTILIB_MATCHES    = nofpu=mnofpu  nofpu=mcpu?rx200  nofpu=mcpu?RX200
+
+MULTILIB_EXCEPTIONS =
+MULTILIB_EXTRA_OPTS =
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
+
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
diff --git a/libgcc/config.host b/libgcc/config.host
index 91fed5fa473..2c297f40270 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1211,6 +1211,9 @@ rx-*-elf)
 	tmake_file="rx/t-rx t-fdpbit"
 	tm_file="$tm_file rx/rx-abi.h rx/rx-lib.h"
 	;;
+rx-*-linux*)
+	tmake_file="rx/t-rx rx/t-linux"
+	;;
 s390-*-linux*)
 	tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux s390/32/t-floattodi t-stack s390/t-stack-s390"
 	md_unwind_header=s390/linux-unwind.h
diff --git a/libgcc/config/rx/t-linux b/libgcc/config/rx/t-linux
new file mode 100644
index 00000000000..41ec3a3d4dc
--- /dev/null
+++ b/libgcc/config/rx/t-linux
@@ -0,0 +1,20 @@
+# Makefile fragment for building LIBGCC for rx-linux.
+# Copyright (C) 2019 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation; either version 3, or (at your
+# option) any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.   See
+# the GNU General Public License for more details.
+#
+# You should have received a copy of the  GNU General Public
+# License along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+HOST_LIBGCC2_CFLAGS += -DDF=SF

-- 
Yosinori Sato



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