[PATCH][GCC][AArch64] Fix big-endian neon-intrinsics ICEs

[James Greenhalgh]

On Mon, Jan 14, 2019 at 08:01:47AM -0600, Tamar Christina wrote:
> Hi All,
> 
> 
> This patch fixes some ICEs when the fcmla_lane intrinsics are used on
> big endian by correcting the lane indices and removing the hardcoded byte
> offset from subreg calls and instead use subreg_lowpart_offset.

Woops.

> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
> Cross compiled and regtested on aarch64_be-none-elf and no issues.
> 
> Ok for trunk?

OK.

Thanks,
James

> gcc/ChangeLog:
> 
> 2019-01-14  Tamar Christina  <tamar.christina@arm.com>
> 
> 	* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use correct
> 	max nunits for endian swap.
> 	(aarch64_expand_fcmla_builtin): Correct subreg code.
> 	* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
> 	aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct lane
> 	endianness.
> 
> --