[PATCH][GCC][Aarch64] Change expected bfxil count in gcc.target/aarch64/combine_bfxil.c to 18 (PR/87763)
Sam Tebbs
Sam.Tebbs@arm.com
Fri Jan 4 10:26:00 GMT 2019
On 12/19/18 4:47 PM, Sam Tebbs wrote:
> Hi all,
>
> Since r265398 (combine: Do not combine moves from hard registers), the bfxil
> scan in gcc.target/aarch64/combine_bfxil.c has been failing.
>
> FAIL: gcc.target/aarch64/combine_bfxil.c scan-assembler-times bfxil\\t 13
>
> This is because bfi was generated for the combine_* functions in the
> above test,
> but as of r265398, bfxil is preferred over bfi and so the bfxil count has
> increased. This patch increases the scan count to 18 to account for this so
> that the test passes.
>
> Before r265398
>
> combine_zero_extended_int:
> bfxil x0, x1, 0, 16
> ret
>
> combine_balanced:
> bfi x0, x1, 0, 32
> ret
>
> combine_minimal:
> bfi x0, x1, 0, 1
> ret
>
> combine_unbalanced:
> bfi x0, x1, 0, 24
> ret
>
> combine_balanced_int:
> bfi w0, w1, 0, 16
> ret
>
> combine_unbalanced_int:
> bfi w0, w1, 0, 8
> ret
>
> With r265398
>
> combine_zero_extended_int:
> bfxil x0, x1, 0, 16
> ret
>
> combine_balanced:
> bfxil x0, x1, 0, 32
> ret
>
> combine_minimal:
> bfxil x0, x1, 0, 1
> ret
>
> combine_unbalanced:
> bfxil x0, x1, 0, 24
> ret
>
> combine_balanced_int:
> bfxil w0, w1, 0, 16
> ret
>
> combine_unbalanced_int:
> bfxil w0, w1, 0, 8
> ret
>
> These bfxil and bfi invocations are equivalent, so this patch won't hide any
> incorrect code-gen.
>
> Bootstrapped on aarch64-none-linux-gnu and regression tested on
> aarch64-none-elf with no regressions.
>
> OK for trunk?
>
> gcc/testsuite/Changelog:
>
> 2018-12-19 Sam Tebbs <sam.tebbs@arm.com>
>
> * gcc.target/aarch64/combine_bfxil.c: Change
> scan-assembler-times bfxil count to 18.
ping
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