[PATCH 34/43] i386: Emulate MMX abs<mode>2 with SSE

Uros Bizjak ubizjak@gmail.com
Sun Feb 10 12:32:00 GMT 2019


On 2/10/19, H.J. Lu <hjl.tools@gmail.com> wrote:
> Emulate MMX abs<mode>2 with SSE.  Only SSE register source operand is
> allowed.
>
> 	PR target/89021
> 	* config/i386/sse.md (abs<mode>2): Add SSE emulation.

OK.

Uros.

> ---
>  gcc/config/i386/sse.md | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
> index e0ea8ab300b..018b1dca984 100644
> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -16092,16 +16092,19 @@
>  })
>
>  (define_insn "abs<mode>2"
> -  [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
> +  [(set (match_operand:MMXMODEI 0 "register_operand" "=y,Yv")
>  	(abs:MMXMODEI
> -	  (match_operand:MMXMODEI 1 "nonimmediate_operand" "ym")))]
> -  "TARGET_SSSE3"
> -  "pabs<mmxvecsize>\t{%1, %0|%0, %1}";
> -  [(set_attr "type" "sselog1")
> +	  (match_operand:MMXMODEI 1 "nonimmediate_operand" "ym,Yv")))]
> +  "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3"
> +  "@
> +   pabs<mmxvecsize>\t{%1, %0|%0, %1}
> +   %vpabs<mmxvecsize>\t{%1, %0|%0, %1}"
> +  [(set_attr "mmx_isa" "native,x64")
> +   (set_attr "type" "sselog1")
>     (set_attr "prefix_rep" "0")
>     (set_attr "prefix_extra" "1")
>     (set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p
> (insn)"))
> -   (set_attr "mode" "DI")])
> +   (set_attr "mode" "DI,TI")])
>
>  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
>  ;;
> --
> 2.20.1
>
>



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