[committed][AArch64] Fix typo in V_INT_CONTAINER

Richard Sandiford richard.sandiford@arm.com
Fri Dec 27 17:18:00 GMT 2019


All VNx2 V_INT_CONTAINER entries should map to VNx2DI.  The lower-case
version was already correct.

Tested on aarch64-linux-gnu and applied as r279743.

Richard


2019-12-27  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (V_INT_CONTAINER): Fix VNx2SF entry.

gcc/testsuite/
	* gcc.target/aarch64/sve/mixed_size_11.c: New test.

Index: gcc/config/aarch64/iterators.md
===================================================================
--- gcc/config/aarch64/iterators.md	2019-12-10 16:32:32.295623698 +0000
+++ gcc/config/aarch64/iterators.md	2019-12-27 16:55:20.678908507 +0000
@@ -1151,7 +1151,7 @@ (define_mode_attr V_INT_CONTAINER [(VNx1
 				   (VNx2DI "VNx2DI")
 				   (VNx8HF "VNx8HI") (VNx4HF "VNx4SI")
 				   (VNx2HF "VNx2DI")
-				   (VNx4SF "VNx4SI") (VNx2SF "VNx2SI")
+				   (VNx4SF "VNx4SI") (VNx2SF "VNx2DI")
 				   (VNx2DF "VNx2DI")])
 
 ;; Lower-case version of V_INT_CONTAINER.
Index: gcc/testsuite/gcc.target/aarch64/sve/mixed_size_11.c
===================================================================
--- /dev/null	2019-09-17 11:41:18.176664108 +0100
+++ gcc/testsuite/gcc.target/aarch64/sve/mixed_size_11.c	2019-12-27 16:55:20.678908507 +0000
@@ -0,0 +1,13 @@
+/* { dg-options "-O3 -msve-vector-bits=256 -fno-tree-loop-distribution" } */
+
+float
+f (float *restrict x, float *restrict y, long *indices)
+{
+  float res = 0.0;
+  for (int i = 0; i < 100; ++i)
+    {
+      res += x[i - 4];
+      x[i] = y[indices[i]];
+    }
+  return res;
+}



More information about the Gcc-patches mailing list