[ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function
Kyrill Tkachov
kyrylo.tkachov@foss.arm.com
Fri Aug 30 08:54:00 GMT 2019
On 8/29/19 4:36 PM, Christophe Lyon wrote:
> On 31/07/2019 16:44, Christophe Lyon wrote:
>> On Tue, 16 Jul 2019 at 14:42, Kyrill Tkachov
>> <kyrylo.tkachov@foss.arm.com> wrote:
>>>
>>>
>>> On 7/16/19 12:18 PM, Kyrill Tkachov wrote:
>>>> Hi Christophe
>>>>
>>>> On 5/15/19 1:39 PM, Christophe Lyon wrote:
>>>>> In FDPIC mode, the trampoline generated to support pointers to nested
>>>>> functions looks like:
>>>>>
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word trampoline address
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word trampoline GOT address
>>>>>            ldr           r12, [pc, #8]
>>>>>            ldr           r9, [pc, #8]
>>>>>            ldr          pc, [pc, #8]
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word GOT address
>>>>> Â Â Â Â Â Â Â Â Â Â Â .word function's address
>>>>>
>>>>> because in FDPIC function pointers are actually pointers to function
>>>>> descriptors, we have to actually generate a function descriptor for
>>>>> the trampoline.
>>>>>
>>>>> 2019-XX-XXÂ Christophe Lyon <christophe.lyon@st.com>
>>>>>         Mickaël Guêné <mickael.guene@st.com>
>>>>>
>>>>> Â Â Â Â Â Â Â Â gcc/
>>>>> Â Â Â Â Â Â Â Â * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
>>>>> Â Â Â Â Â Â Â Â support.
>>>>> Â Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
>>>>> Â Â Â Â Â Â Â Â (arm_trampoline_init): Likewise.
>>>>> Â Â Â Â Â Â Â Â * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.
>>>>>
>>>>> Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144
>>>>>
>>>>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>>>>> index 40e3f3b..99d13bf 100644
>>>>> --- a/gcc/config/arm/arm.c
>>>>> +++ b/gcc/config/arm/arm.c
>>>>> @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl)
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â .word function's address
>>>>> Â Â Â Â XXX FIXME: When the trampoline returns, r8 will be
>>>>> clobbered. */
>>>>> +/* In FDPIC mode, the trampoline looks like:
>>>>> +Â Â Â Â Â Â Â Â Â .word trampoline address
>>>>> +Â Â Â Â Â Â Â Â Â .word trampoline GOT address
>>>>> +         ldr           r12, [pc, #8] ; #4 for Thumb2
>>>>> +         ldr           r9, [pc, #8] ; #4 for Thumb2
>>>>> +         ldr          pc, [pc, #8] ; #4 for Thumb2
>>>>> +Â Â Â Â Â Â Â Â Â .word static chain value
>>>>> +Â Â Â Â Â Â Â Â Â .word GOT address
>>>>> +Â Â Â Â Â Â Â Â Â .word function's address
>>>>> +*/
>>>>
>>>>
>>>> I think this comment is not right for Thumb2.
>>>>
>>>> These load instructionshave 32-bit encodings, even in Thumb2 (they use
>>>> high registers).
>>>
>>> Andre and Wilco pointed out to me offline that the offset should be #4
>>> for Arm mode.
>>>
>>> The Arm ARM at E1.2.3 says:
>>>
>>> PC, the program counter
>>>
>>> * When executing an A32 instruction, PC reads as the address of the
>>> current instruction plus 8.
>>>
>>> * When executing a T32 instruction, PC reads as the address of the
>>> current instruction plus 4.
>>>
>>
>> Yes, it looks like the code is right, and the comment is wrong:
>> - offset 8 for thumb2 mode
>> - offset 4 for arm mode
>>
> Here is the updated version
>
Ok with a fixed ChangeLog (it currently mentions arm_trampoline_init
twice but doesn't mention arm_trampoline_adjust_address)
Thanks,
Kyrill
>> Thanks,
>>
>> Christophe
>>
>>> Thanks,
>>>
>>> Kyrill
>>>
>>>
>>>>
>>>> Also, please merge this comment with the one above (no separate /**/)
>>>>
>>>>>
>>>>> Â static void
>>>>> Â arm_asm_trampoline_template (FILE *f)
>>>>> Â {
>>>>> Â Â Â fprintf (f, "\t.syntax unified\n");
>>>>>
>>>>> -Â if (TARGET_ARM)
>>>>> +Â if (TARGET_FDPIC)
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â /* The first two words are a function descriptor pointing
>>>>> to the
>>>>> +       trampoline code just below. */
>>>>> +Â Â Â Â Â if (TARGET_ARM)
>>>>> +Â Â Â Â Â Â fprintf (f, "\t.arm\n");
>>>>> +Â Â Â Â Â else if (TARGET_THUMB2)
>>>>> +Â Â Â Â Â Â fprintf (f, "\t.thumb\n");
>>>>> +Â Â Â Â Â else
>>>>> +      /* Only ARM and Thumb-2 are supported. */
>>>>> +Â Â Â Â Â Â gcc_unreachable ();
>>>>> +
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â Â Â /* Trampoline code which sets the static chain register but
>>>>> also
>>>>> +Â Â Â Â Â Â Â PIC register before jumping into real code. */
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â STATIC_CHAIN_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>> +Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â PC_REGNUM, PC_REGNUM,
>>>>> +Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â TARGET_THUMB2 ? 8 : 4);
>>>>
>>>>
>>>> As above, I think the offset should be 8 for both Arm and Thumb2.
>>>>
>>>> Thanks,
>>>>
>>>> Kyrill
>>>>
>>>>
>>>>> +Â Â Â Â Â assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
>>>>> +Â Â Â }
>>>>> +Â else if (TARGET_ARM)
>>>>> Â Â Â Â Â {
>>>>> Â Â Â Â Â Â Â fprintf (f, "\t.arm\n");
>>>>> Â Â Â Â Â Â Â asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM,
>>>>> PC_REGNUM);
>>>>> @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree
>>>>> fndecl,
>>>>> rtx chain_value)
>>>>> Â Â Â emit_block_move (m_tramp, assemble_trampoline_template (),
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
>>>>>
>>>>> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>>> -Â emit_move_insn (mem, chain_value);
>>>>> +Â if (TARGET_FDPIC)
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
>>>>> +Â Â Â Â Â rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
>>>>> +Â Â Â Â Â rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode,
>>>>> funcdesc, 4));
>>>>> +Â Â Â Â Â /* The function start address is at offset 8, but in Thumb
>>>>> mode
>>>>> +Â Â Â Â Â Â Â we want bit 0 set to 1 to indicate Thumb-ness, hence 9
>>>>> +       below. */
>>>>> +Â Â Â Â Â rtx trampoline_code_start
>>>>> +Â Â Â Â Â Â = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9
>>>> : 8);
>>>>> +
>>>>> +     /* Write initial funcdesc which points to the trampoline. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 0);
>>>>> +Â Â Â Â Â emit_move_insn (mem, trampoline_code_start);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 4);
>>>>> +Â Â Â Â Â emit_move_insn (mem, gen_rtx_REG (Pmode,
>>>> PIC_OFFSET_TABLE_REGNUM));
>>>>> +     /* Setup static chain. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 20);
>>>>> +Â Â Â Â Â emit_move_insn (mem, chain_value);
>>>>> +     /* GOT + real function entry point. */
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 24);
>>>>> +Â Â Â Â Â emit_move_insn (mem, gotaddr);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, 28);
>>>>> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â }
>>>>> +Â else
>>>>> +Â Â Â {
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
>>>>> +Â Â Â Â Â emit_move_insn (mem, chain_value);
>>>>>
>>>>> -Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
>>>>> -Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>>> -Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â Â Â mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 :
>>>>> 16);
>>>>> +Â Â Â Â Â fnaddr = XEXP (DECL_RTL (fndecl), 0);
>>>>> +Â Â Â Â Â emit_move_insn (mem, fnaddr);
>>>>> +Â Â Â }
>>>>>
>>>>> Â Â Â a_tramp = XEXP (m_tramp, 0);
>>>>> Â Â Â emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
>>>>> @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl,
>>>>> rtx chain_value)
>>>>> Â static rtx
>>>>> Â arm_trampoline_adjust_address (rtx addr)
>>>>> Â {
>>>>> -Â if (TARGET_THUMB)
>>>>> +Â /* For FDPIC don't fix trampoline address since it's a function
>>>>> +    descriptor and not a function address. */
>>>>> +Â if (TARGET_THUMB && !TARGET_FDPIC)
>>>>> Â Â Â Â Â addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
>>>>> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â NULL, 0, OPTAB_LIB_WIDEN);
>>>>> Â Â Â return addr;
>>>>> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
>>>>> index 45c0e2b..f80df63 100644
>>>>> --- a/gcc/config/arm/arm.h
>>>>> +++ b/gcc/config/arm/arm.h
>>>>> @@ -1602,7 +1602,7 @@ typedef struct
>>>>> Â #define INIT_EXPANDERSÂ arm_init_expanders ()
>>>>>
>>>>> Â /* Length in units of the trampoline for entering a nested
>>>> function. */
>>>>> -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20)
>>>>> +#define TRAMPOLINE_SIZEÂ (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16
>>>>> : 20))
>>>>>
>>>>>  /* Alignment required for a trampoline in bits. */
>>>>> Â #define TRAMPOLINE_ALIGNMENTÂ 32
>>>>> --
>>>>> 2.6.3
>>>>>
>> .
>>
>
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