[RFC][vect]PR: 65930 teach vectorizer to handle SUM reductions with sign-change casts

[Andre Vieira (lists)]

Hi Richard,

I have come up with a way to teach the vectorizer to handle 
sign-changing reductions, restricted to SUM operations as I'm not sure 
other reductions are equivalent with different signs.

The main nature of this approach is to let it recognize reductions of 
the form: 
Phi->NopConversion?->Plus/Minus-reduction->NopConversion?->Phi. Then 
vectorize the statements normally, with some extra workarounds to handle 
the conversions. This is mainly needed where it looks for uses of the 
result of the reduction, we now need to check the uses of the result of 
the conversion instead.

I am curious to know what you think of this approach. I have regression 
tested this on aarch64 and x86_64 with AVX512 and it shows no 
regressions. On the 1 month old version of trunk I tested on it even 
seems to make gcc.dg/vect/pr89268.c pass, where it used to fail with an 
ICE complaining about a definition not dominating a use.

The initial benchmarks I did also show a 14% improvement on x264_r on 
SPEC2017 for aarch64.

Cheers,
Andre
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