[EXT] Re: [Patch] PR rtl-optimization/87763 - generate more bfi instructions on aarch64

Steve Ellcey sellcey@marvell.com
Thu Apr 11 15:14:00 GMT 2019


On Thu, 2019-04-11 at 09:59 +0100, Richard Earnshaw (lists) wrote:
> 
> > 
> > 2018-04-10  Steve Ellcey  <sellcey@marvell.com>
> > 
> > 	PR rtl-optimization/87763
> > 	* config/aarch64/aarch64-protos.h
> > (aarch64_masks_and_shift_for_bfi_p):
> > 	New prototype.
> > 	* config/aarch64/aarch64.c (aarch64_masks_and_shift_for_bfi_p):
> > 	New function.
> > 	* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode>5_shift):
> > 	New instruction.
> > 	(*aarch64_bfi<GPI:mode>5_shift_alt): Ditto.
> > 	(*aarch64_bfi<GPI:mode>4_noand): Ditto.
> > 	(*aarch64_bfi<GPI:mode>4_noand_alt): Ditto.
> > 	(*aarch64_bfi<GPI:mode>4_noshift): Ditto.
> > 
> 
> You've removed the ..._noshift_alt variant.  That wasn't my intention,
> so perhaps you misunderstood what I was trying to say.
>
> The two versions are both needed, since the register tie is not
> orthogonal to the constants used in the masks and canonicalization will
> not generate a consistent ordering of the operands.

I started doing this and then convinced myself (perhaps incorrectly)
that I didn't need the alt version.  Operands 1 and 3 are registers
and Operands 2 and 4 are constants, so the only difference is in the 
call to aarch64_masks_and_shift_for_bfi_p.  Given that argument 2 to
this call is 0 this call should be the equivelent of ((x & MASK1) | (y
& MASK2)) and that should mean that:

aarch64_masks_and_shift_for_bfi_p(X,0,Y) ==
aarch64_masks_and_shift_for_bfi_p(Y,0,X)


Maybe I am wrong about that?  I will do some expirements.  My testing
did not find any cases in the testsuite where not having the _alt
version resulted in a bfi not being generated.

Steve Ellcey
sellcey@marvell.com
> > 


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