Transform assertion into optimization hints

[Jonathan Wakely]

On 19/09/18 10:42 +0100, Jonathan Wakely wrote:
>On 19/09/18 10:16 +0100, Jonathan Wakely wrote:
>>On 17/09/18 23:15 +0200, Marc Glisse wrote:
>>>On Mon, 17 Sep 2018, François Dumont wrote:
>>>
>>>>We talk about it a while back.
>>>>
>>>>I've run testsuite several times since I have this patch on my 
>>>>local copy. Note that when I implemented it the wrong way tests 
>>>>started to fail so it is clearly having an effect on the 
>>>>generated code.
>>>>
>>>>* include/bits/c++config [__OPTIMIZE__](__glibcxx_assert): 
>>>>Define as optimization hint
>>>>
>>>>using __builtin_unreachable.
>>>>
>>>>Ok to commit ?
>>>
>>>I see for instance in bits/regex_automaton.tcc:
>>>
>>>            __glibcxx_assert(__m.count(__ref._M_next) > 0);
>>>
>>>where __m is a map, which does not look so well suited for a 
>>>__builtin_unreachable. Is it using the wrong macro?
>>
>>Yes, that looks like it's checking the implementation, but we should
>>only add assertions to check what users do (we just need to get our
>>own implementation right).
>
>I'll test this patch.

Committed to trunk.

       * include/bits/regex_automaton.tcc (_StateSeq<_TraitsT>::_M_clone()):
       Remove __glibcxx_assert statements and use map::find instead of
       map::operator[].


>diff --git a/libstdc++-v3/include/bits/regex_automaton.tcc b/libstdc++-v3/include/bits/regex_automaton.tcc
>index 7a0e6a36a7a..5993fcfeeaf 100644
>--- a/libstdc++-v3/include/bits/regex_automaton.tcc
>+++ b/libstdc++-v3/include/bits/regex_automaton.tcc
>@@ -220,16 +220,9 @@ namespace __detail
> 	  auto __v = __it.second;
> 	  auto& __ref = _M_nfa[__v];
> 	  if (__ref._M_next != _S_invalid_state_id)
>-	    {
>-	      __glibcxx_assert(__m.count(__ref._M_next) > 0);
>-	      __ref._M_next = __m[__ref._M_next];
>-	    }
>-	  if (__ref._M_has_alt())
>-	    if (__ref._M_alt != _S_invalid_state_id)
>-	      {
>-		__glibcxx_assert(__m.count(__ref._M_alt) > 0);
>-		__ref._M_alt = __m[__ref._M_alt];
>-	      }
>+	    __ref._M_next = __m.find(__ref._M_next)->second;
>+	  if (__ref._M_has_alt() && __ref._M_alt != _S_invalid_state_id)
>+	    __ref._M_alt = __m.find(__ref._M_alt)->second;
> 	}
>       return _StateSeq(_M_nfa, __m[_M_start], __m[_M_end]);
>     }