[PATCH, pdp11] Enable LRA for pdp11

[Paul Koning]

This patch enables LRA register allocator support for pdp11.  For the moment, it is invoked via a switch (-mlra) as is done by a few other targets.  There are some code quality issues and test suite rejects to be looked at, but it's close enough for initial delivery.

Thanks to Segher for pointing out that LRA requires define_memory_constraint, while the old allocator is happy when memory operands use define_constraint. 

Committed.

	paul

ChangeLog:

2018-10-03  Paul Koning  <ni1d@arrl.net>

	Enable LRA register allocator for PDP11.
	* config/pdp11/constraints.md (Q): Use define_memory_constraints.
	(R): Likewise.
	(D): Likewise.
	* config/pdp11/pdp11.c (pdp11_lra_p): New function.
	* config/pdp11/pdp11.opt (-mlra): New option.
	* doc/invoke.texi (PDP-11 Options): Document -mlra.

Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi	(revision 264818)
+++ doc/invoke.texi	(revision 264819)
@@ -1007,7 +1007,7 @@ Objective-C and Objective-C++ Dialects}.
 @gccoptlist{-mfpu  -msoft-float  -mac0  -mno-ac0  -m40  -m45  -m10 @gol
 -mint32  -mno-int16 -mint16  -mno-int32 @gol
 -mfloat32  -mno-float64 -mfloat64  -mno-float32 @gol
--msplit -munix-asm  -mdec-asm -mgnu-asm}
+-msplit -munix-asm  -mdec-asm -mgnu-asm -mlra}
 
 @emph{picoChip Options}
 @gccoptlist{-mae=@var{ae_type}  -mvliw-lookahead=@var{N} @gol
@@ -22721,6 +22721,11 @@ Use DEC assembler syntax.
 @item -mgnu-asm
 @opindex mgnu-asm
 Use GNU assembler syntax.  This is the default.
+
+@item -mlra
+@opindex mlra
+Use the new LRA register allocator.  By default, the old ``reload''
+allocator is used.
 @end table
 
 @node picoChip Options
Index: config/pdp11/constraints.md
===================================================================
--- config/pdp11/constraints.md	(revision 264818)
+++ config/pdp11/constraints.md	(revision 264819)
@@ -70,19 +70,19 @@
   (and (match_code "const_double")
        (match_test "op == CONST0_RTX (GET_MODE (op))")))
 
-(define_constraint "Q"
+(define_memory_constraint "Q"
   "Memory reference that requires an additional word after the opcode"
   (and (match_code "mem")
        (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0))
                     && !simple_memory_operand (op, GET_MODE (op))")))
 
-(define_constraint "R"
+(define_memory_constraint "R"
   "Memory reference that is encoded within the opcode"
   (and (match_code "mem")
        (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0))
                     && simple_memory_operand (op, GET_MODE (op))")))
 
-(define_constraint "D"
+(define_memory_constraint "D"
   "Memory reference that is encoded within the opcode, and not push or pop"
   (and (match_code "mem")
        (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0))
Index: config/pdp11/pdp11.c
===================================================================
--- config/pdp11/pdp11.c	(revision 264818)
+++ config/pdp11/pdp11.c	(revision 264819)
@@ -230,7 +230,7 @@ static bool pdp11_scalar_mode_supported_p (scalar_
 #define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS pdp11_preferred_output_reload_class
 
 #undef  TARGET_LRA_P
-#define TARGET_LRA_P hook_bool_void_false
+#define TARGET_LRA_P pdp11_lra_p
 
 #undef  TARGET_LEGITIMATE_ADDRESS_P
 #define TARGET_LEGITIMATE_ADDRESS_P pdp11_legitimate_address_p
@@ -991,6 +991,12 @@ pdp11_assemble_integer (rtx x, unsigned int size,
 }
 
 
+static bool
+pdp11_lra_p (void)
+{
+  return TARGET_LRA;
+}
+
 /* Register to register moves are cheap if both are general
    registers.  */
 static int 
Index: config/pdp11/pdp11.opt
===================================================================
--- config/pdp11/pdp11.opt	(revision 264818)
+++ config/pdp11/pdp11.opt	(revision 264819)
@@ -73,3 +73,7 @@ Target has split I&D.
 munix-asm
 Target RejectNegative Report Mask(UNIX_ASM) Negative(mdec-asm)
 Use UNIX assembler syntax.
+
+mlra
+Target Report Mask(LRA)
+Use LRA register allocator