[PATCH] combine: Do not combine moves from hard registers

[Jeff Law]

On 11/9/18 9:50 PM, Segher Boessenkool wrote:
> On Fri, Nov 09, 2018 at 02:12:22PM -0700, Jeff Law wrote:
>> On 11/8/18 1:34 PM, Segher Boessenkool wrote:
>>> On Thu, Nov 08, 2018 at 03:44:44PM +0000, Sam Tebbs wrote:
>>>> Does your patch fix the incorrect generation of "scvtf s1, s1"? I was
>>>> looking at the issue as well and don't want to do any overlapping work.
>>>
>>> I don't know.  Well, there are no incorrect code issues I know of at all
>>> now; but you mean that it is taking an instruction more than you would
>>> like to see, I suppose?
>> Which is ultimately similar to the 3 regressions HJ has reported on x86_64.
> 
> I just wish those bug reports would mature from "oh hey this patch changed
> some stuff" to "oh yeah this made some existing problems (in the backend,
> or common code, hey let's blame RA because it's most obvious here, why not!)
> more obvious".
> 
> All those PRs show situations where we could generate better code.  None
> of those PRs show situations where the combine patches were at fault.
> 
> Blaming others is not going to improve your code one bit.
> 
> 
> (And yes, i'll commit one further improvement patch _right now_).
I agree to a degree, but it's also the case that these are clearly code
quality regressions triggered by your changes.  Your help in resolving
them would be greatly appreciated.

Jeff