[PATCH, rs6000] Fix expected BE counts for vsx-vector-6.h

[Carl Love]

GCC Maintainers:

The following patch fixes issues found with the instruction counts for
the vsx-vector-6.h test.  It was found that on a BE system where GCC is
configured with --with-cpu=power6 the expected counts in vsx-vector-6-
be.c do not match.  This patch fixes the expected counts when
configuring and building GCC using --with-cpu=power6, --with-cpu=power7 
and --with-cpu=power8 on a BE system.

The patch was tested on 

    powerpc64le-unknown-linux-gnu (Power 8 LE)
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power6  
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power7
   Â powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power8

Please let me know if the patch looks OK for GCC mainline.

                         Carl Love
---------------------------------------------------------

gcc/testsuite/ChangeLog:

2018-05-10 Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/vsx-vector-6-be.c (dg-options): Update to run on
	Power 6 only.
	(dg-final): Update xvcmpgtdp, xvcmpgedp counts for Power 6.
	* gcc.target/powerpc/vsx-vector-6-be.p7.c (dg-final): New test file for
	Power 7.
	* gcc.target/powerpc/vsx-vector-6-be.p8.c (dg-final): New test file for
	Power 8.
---
 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c |  7 +++--
 .../gcc.target/powerpc/vsx-vector-6-be.p7.c        | 34 ++++++++++++++++++++++
 .../gcc.target/powerpc/vsx-vector-6-be.p8.c        | 34 ++++++++++++++++++++++
 3 files changed, 72 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
index 3305781..aa2093c 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
@@ -1,15 +1,16 @@
 /* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-mvsx -O2" } */
+/* { dg-options "-mvsx -O2 -mcpu=power6" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
 
 /* Expected instruction counts for Big Endian */
 
 /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
 /* { dg-final { scan-assembler-times "xvadddp" 1 } } */
 /* { dg-final { scan-assembler-times "xxlnor" 7 } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 9 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp" 10 } } */
 /* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
 /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
new file mode 100644
index 0000000..01c3c2b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
@@ -0,0 +1,34 @@
+/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -mcpu=power7" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+
+
+/* Expected instruction counts for Big Endian */
+
+/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
+/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
+/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
+/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
+/* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times "xxsel" 2 } } */
+
+/* Source code for the test in vsx-vector-6.h */
+#include "vsx-vector-6.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c
new file mode 100644
index 0000000..2f72378
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c
@@ -0,0 +1,34 @@
+/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -mcpu=power8" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+
+/* Expected instruction counts for Big Endian */
+
+/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
+/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
+/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
+/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
+/* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times "xxsel" 2 } } */
+
+/* Source code for the test in vsx-vector-6.h */
+#include "vsx-vector-6.h"
-- 
2.7.4