[PATCH, rs6000] Clarify when typedef names can be used with AltiVec vector types

[Bill Schmidt]

Hi,

We recently discovered some incorrect documentation about this topic and agreed it should be changed.
This is my attempt to clarify it.  Built and verified on powerpc64le-linux-gnu.  Is this ok for trunk?

Thanks,
Bill


2018-12-17  Bill Schmidt  <wschmidt@linux.ibm.com>

	* doc/extend.texi (PowerPC Altivec/VSX Built-in Functions):
	Describe when a typedef name can be used as the type specifier for
	a vector type, and when it cannot.


Index: gcc/doc/extend.texi
===================================================================
--- gcc/doc/extend.texi	(revision 265974)
+++ gcc/doc/extend.texi	(working copy)
@@ -16229,9 +16229,30 @@ disabled.  To use them, you must include @code{<al
 
 @item
 GCC allows using a @code{typedef} name as the type specifier for a
-vector type.
+vector type, but only under the following circumstances:
 
+@itemize @bullet
+
 @item
+When using __vector instead of vector; for example,
+
+@smallexample
+typedef signed short int16;
+__vector int16 data;
+@end smallexample
+
+@item
+When using vector in keyword-and-predefine mode; for example,
+
+@smallexample
+/* With -maltivec only: */
+typedef signed short int16;
+vector int16 data;
+@end smallexample
+
+@end itemize
+
+@item
 For C, overloaded functions are implemented with macros so the following
 does not work: