[PATCH] rs6000: Improve scc isel

Segher Boessenkool segher@kernel.crashing.org
Tue Nov 28 01:07:00 GMT 2017


If we have a negative condition we can use a literal 0 in the isel,
instead of having to load it into a register.  If the condition is from
a comparison with an immediate we can change e.g. LT to LE and adjust
the immediate, saving a li instruction.

Bootstrapped and tested on powerpc64-linux {-m32,-m64} (--with-cpu=power7
and forcing -misel on).  Committing to trunk.


Segher


2017-11-28  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.md (<code><GPR:mode><GPR2:mode>2_isel): Change
	LT/GT/LTU/GTU to LE/GE/LEU/GEU where possible.

---
 gcc/config/rs6000/rs6000.md | 36 ++++++++++++++++++++++++++++++++----
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 30db0c5..13ce53a 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -12343,8 +12343,34 @@ (define_insn_and_split "<code><GPR:mode><GPR2:mode>2_isel"
   "&& 1"
   [(pc)]
 {
-  if (<CODE> == NE || <CODE> == LE || <CODE> == GE
-      || <CODE> == LEU || <CODE> == GEU)
+  rtx_code code = <CODE>;
+  if (CONST_INT_P (operands[2]) && code != EQ && code != NE)
+    {
+      HOST_WIDE_INT val = INTVAL (operands[2]);
+      if (code == LT && val != -0x8000)
+	{
+	  code = LE;
+	  val--;
+	}
+      if (code == GT && val != 0x7fff)
+	{
+	  code = GE;
+	  val++;
+	}
+      if (code == LTU && val != 0)
+	{
+	  code = LEU;
+	  val--;
+	}
+      if (code == GTU && val != 0xffff)
+	{
+	  code = GEU;
+	  val++;
+	}
+      operands[2] = GEN_INT (val);
+    }
+
+  if (code == NE || code == LE || code == GE || code == LEU || code == GEU)
     operands[3] = const0_rtx;
   else
     {
@@ -12363,14 +12389,16 @@ (define_insn_and_split "<code><GPR:mode><GPR2:mode>2_isel"
   rtx c1 = gen_rtx_COMPARE (<UNS>mode, operands[1], operands[2]);
   emit_insn (gen_rtx_SET (operands[5], c1));
 
-  rtx c2 = gen_rtx_fmt_ee (<CODE>, <GPR:MODE>mode, operands[5], const0_rtx);
+  rtx c2 = gen_rtx_fmt_ee (code, <GPR:MODE>mode, operands[5], const0_rtx);
   rtx x = gen_rtx_IF_THEN_ELSE (<GPR:MODE>mode, c2, operands[4], operands[3]);
   emit_move_insn (operands[0], x);
 
   DONE;
 }
   [(set (attr "cost")
-	(if_then_else (match_test "<CODE> == NE || <CODE> == LE || <CODE> == GE
+	(if_then_else (match_test "(CONST_INT_P (operands[2]) && <CODE> != EQ)
+				   || <CODE> == NE
+				   || <CODE> == LE || <CODE> == GE
 				   || <CODE> == LEU || <CODE> == GEU")
 		      (const_string "9")
 		      (const_string "10")))])
-- 
1.8.3.1



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