[PATCH][GCC][AARCH64]Bad code-gen for structure/block/unaligned memory access
James Greenhalgh
james.greenhalgh@arm.com
Tue Nov 14 18:01:00 GMT 2017
On Tue, Nov 14, 2017 at 04:05:12PM +0000, Tamar Christina wrote:
> Hi James,
>
> I have split off the aarch64 bit off from the generic parts and processed your feedback.
>
> Attached is the reworked patch.
>
> Ok for Tunk?
Thanks for the respin, I'm a bit confused by this comment.
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index e89c8156976cecf200cd67c1e938c8156c1240c4..bc197cc973a2bbc2c263809c7e8ccfbc86309c26 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -13974,6 +13974,28 @@ aarch64_expand_movmem (rtx *operands)
> base = copy_to_mode_reg (Pmode, XEXP (src, 0));
> src = adjust_automodify_address (src, VOIDmode, base, 0);
>
> + /* Optimize routines for MEM to REG copies.
> + This particular function only handles copying to two
> + destination types: 1) a regular register and 2) the stack.
> + When writing to a regular register we may end up writting too much in cases
> + where the register already contains a live value or when no data padding is
> + happening so we disallow regular registers to use this new code path. */
I'm struggling to understand when you'd end up with a struct held in
a partial register going through this code path. Maybe the restriction
makes sense, can you write a testcase, or show some sample code where
this goes wrong (or simplify the comment).
Thanks,
James
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