[GCC-6.4][ARM][PATCH] enable FL_LPAE flag for armv7ve cores

[Kyrill Tkachov]

Hi Andre,

On 08/11/17 05:12, Andre McCurdy wrote:
> The following commit added the FL_LPAE flag to FL_FOR_ARCH7VE, but
> neglected to also add it to the armv7ve compatible cores defined in
> arm-cores.def.
>
> https://github.com/gcc-mirror/gcc/commit/af2d9b9e58e8be576c53d94f30c48c68146b0c98
>
> The result is that gcc 6.4 now refuses to allow -march=armv7ve and
> -mcpu=XXX to be used together, even when -mcpu is set to an armv7ve
> compatible core:
>
>   arm-linux-gnueabi-gcc -march=armv7ve -mcpu=cortex-a7 -Werror ...
>   error: switch -mcpu=cortex-a7 conflicts with -march=armv7ve switch 
> [-Werror]
>
> This is a regression relative to gcc 6.3.
>
> Fix by defining flags for armv7ve compatible cores directly from
> FL_FOR_ARCH7VE, rather than re-creating the armv7ve flags
> independently by combining FL_FOR_ARCH7A with the armv7ve specific
> FL_THUMB_DIV and FL_ARM_DIV flags.
>

Thank you for the patch. The change looks reasonable to me.
The way CPUs are defined internally was changed for GCC 7
so later branches won't have this problem.

How has this patch been tested?
This should be ready for committing with a proper
ChangeLog entry [1].

Thanks,
Kyrill

[1] https://gcc.gnu.org/codingconventions.html#ChangeLogs or have a look 
in the ChangeLog files in the gcc/ directory for examples

> Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
> ---
>  gcc/config/arm/arm-cores.def | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
> index 829b839..ca37e6f 100644
> --- a/gcc/config/arm/arm-cores.def
> +++ b/gcc/config/arm/arm-cores.def
> @@ -145,12 +145,12 @@ 
> ARM_CORE("cortex-m0plus.small-multiply",cortexm0plussmallmultiply, 
> cortexm0plus,
>  /* V7 Architecture Processors */
>  ARM_CORE("generic-armv7-a",     genericv7a, genericv7a,         
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex)
>  ARM_CORE("cortex-a5",           cortexa5, cortexa5,             
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a5)
> -ARM_CORE("cortex-a7",          cortexa7, cortexa7,             
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a7)
> +ARM_CORE("cortex-a7",          cortexa7, cortexa7,             
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a7)
>  ARM_CORE("cortex-a8",           cortexa8, cortexa8,             
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a8)
>  ARM_CORE("cortex-a9",           cortexa9, cortexa9,             
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a9)
> -ARM_CORE("cortex-a12",         cortexa12, cortexa17,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a12)
> -ARM_CORE("cortex-a15",         cortexa15, cortexa15,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a15)
> -ARM_CORE("cortex-a17",         cortexa17, cortexa17,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a12)
> +ARM_CORE("cortex-a12",         cortexa12, cortexa17,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12)
> +ARM_CORE("cortex-a15",         cortexa15, cortexa15,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a15)
> +ARM_CORE("cortex-a17",         cortexa17, cortexa17,           
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12)
>  ARM_CORE("cortex-r4",           cortexr4, cortexr4,             
> 7R,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex)
>  ARM_CORE("cortex-r4f",          cortexr4f, cortexr4f,           
> 7R,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex)
>  ARM_CORE("cortex-r5",           cortexr5, cortexr5,             
> 7R,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARM_DIV | FL_FOR_ARCH7R), 
> cortex)
> @@ -162,8 +162,8 @@ ARM_CORE("cortex-m3", cortexm3, 
> cortexm3,             7M,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED |
>  ARM_CORE("marvell-pj4",         marvell_pj4, marvell_pj4,       
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), marvell_pj4)
>
>  /* V7 big.LITTLE implementations */
> -ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,  
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a15)
> -ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,  
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | 
> FL_FOR_ARCH7A), cortex_a12)
> +ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,  
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a15)
> +ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,  
> 7A,     ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7VE), cortex_a12)
>
>  /* V8 Architecture Processors */
>  ARM_CORE("cortex-a32",  cortexa32, cortexa53,   8A, 
> ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35)
> -- 
> 1.9.1
>