[committed] Backports to gcc-6-branch
Jakub Jelinek
jakub@redhat.com
Fri May 5 22:18:00 GMT 2017
Hi!
I've committed over 3 dozens backports to the 6.x branch,
after bootstrapping/regtesting them on x86_64-linux and i686-linux.
Jakub
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-16 Jakub Jelinek <jakub@redhat.com>
PR c++/79512
* c-parser.c (c_parser_omp_target): For -fopenmp-simd
ignore #pragma omp target even when not followed by identifier.
* parser.c (cp_parser_omp_target): For -fopenmp-simd
ignore #pragma omp target even when not followed by identifier.
* c-c++-common/gomp/pr79512.c: New test.
--- gcc/c/c-parser.c (revision 245503)
+++ gcc/c/c-parser.c (revision 245504)
@@ -16505,6 +16505,11 @@ c_parser_omp_target (c_parser *parser, e
return c_parser_omp_target_update (loc, parser, context);
}
}
+ if (!flag_openmp) /* flag_openmp_simd */
+ {
+ c_parser_skip_to_pragma_eol (parser, false);
+ return false;
+ }
stmt = make_node (OMP_TARGET);
TREE_TYPE (stmt) = void_type_node;
--- gcc/cp/parser.c (revision 245503)
+++ gcc/cp/parser.c (revision 245504)
@@ -35981,6 +35981,11 @@ cp_parser_omp_target (cp_parser *parser,
return cp_parser_omp_target_update (parser, pragma_tok, context);
}
}
+ if (!flag_openmp) /* flag_openmp_simd */
+ {
+ cp_parser_skip_to_pragma_eol (parser, pragma_tok);
+ return false;
+ }
stmt = make_node (OMP_TARGET);
TREE_TYPE (stmt) = void_type_node;
--- gcc/testsuite/c-c++-common/gomp/pr79512.c (nonexistent)
+++ gcc/testsuite/c-c++-common/gomp/pr79512.c (revision 245504)
@@ -0,0 +1,14 @@
+/* PR c++/79512 */
+/* { dg-options "-fopenmp-simd" } */
+
+void
+foo (void)
+{
+ #pragma omp target
+ #pragma omp teams
+ {
+ int i;
+ for (i = 0; i < 10; i++)
+ ;
+ }
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-18 Jakub Jelinek <jakub@redhat.com>
PR target/79559
* config/i386/i386.c (ix86_print_operand): Use output_operand_lossage
instead of gcc_assert for K, r and R code checks. Formatting fixes.
* gcc.target/i386/pr79559.c: New test.
--- gcc/config/i386/i386.c (revision 245559)
+++ gcc/config/i386/i386.c (revision 245560)
@@ -17847,8 +17847,8 @@ ix86_print_operand (FILE *file, rtx x, i
break;
default:
- output_operand_lossage
- ("invalid operand size for operand code 'O'");
+ output_operand_lossage ("invalid operand size for operand "
+ "code 'O'");
return;
}
@@ -17882,15 +17882,14 @@ ix86_print_operand (FILE *file, rtx x, i
return;
default:
- output_operand_lossage
- ("invalid operand size for operand code 'z'");
+ output_operand_lossage ("invalid operand size for operand "
+ "code 'z'");
return;
}
}
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
- warning
- (0, "non-integer operand used with operand code 'z'");
+ warning (0, "non-integer operand used with operand code 'z'");
/* FALLTHRU */
case 'Z':
@@ -17952,13 +17951,12 @@ ix86_print_operand (FILE *file, rtx x, i
}
else
{
- output_operand_lossage
- ("invalid operand type used with operand code 'Z'");
+ output_operand_lossage ("invalid operand type used with "
+ "operand code 'Z'");
return;
}
- output_operand_lossage
- ("invalid operand size for operand code 'Z'");
+ output_operand_lossage ("invalid operand size for operand code 'Z'");
return;
case 'd':
@@ -18157,7 +18155,12 @@ ix86_print_operand (FILE *file, rtx x, i
break;
case 'K':
- gcc_assert (CONST_INT_P (x));
+ if (!CONST_INT_P (x))
+ {
+ output_operand_lossage ("operand is not an integer, invalid "
+ "operand code 'K'");
+ return;
+ }
if (INTVAL (x) & IX86_HLE_ACQUIRE)
#ifdef HAVE_AS_IX86_HLE
@@ -18180,8 +18183,12 @@ ix86_print_operand (FILE *file, rtx x, i
return;
case 'r':
- gcc_assert (CONST_INT_P (x));
- gcc_assert (INTVAL (x) == ROUND_SAE);
+ if (!CONST_INT_P (x) || INTVAL (x) != ROUND_SAE)
+ {
+ output_operand_lossage ("operand is not a specific integer, "
+ "invalid operand code 'r'");
+ return;
+ }
if (ASSEMBLER_DIALECT == ASM_INTEL)
fputs (", ", file);
@@ -18194,7 +18201,12 @@ ix86_print_operand (FILE *file, rtx x, i
return;
case 'R':
- gcc_assert (CONST_INT_P (x));
+ if (!CONST_INT_P (x))
+ {
+ output_operand_lossage ("operand is not an integer, invalid "
+ "operand code 'R'");
+ return;
+ }
if (ASSEMBLER_DIALECT == ASM_INTEL)
fputs (", ", file);
@@ -18309,7 +18321,7 @@ ix86_print_operand (FILE *file, rtx x, i
return;
default:
- output_operand_lossage ("invalid operand code '%c'", code);
+ output_operand_lossage ("invalid operand code '%c'", code);
}
}
--- gcc/testsuite/gcc.target/i386/pr79559.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79559.c (revision 245560)
@@ -0,0 +1,11 @@
+/* PR target/79559 */
+/* { dg-do compile } */
+
+void
+foo (int x)
+{
+ __asm__ volatile ("# %K0" : : "r" (x)); /* { dg-error "invalid operand code" } */
+ __asm__ volatile ("# %r0" : : "r" (x)); /* { dg-error "invalid operand code" } */
+ __asm__ volatile ("# %r0" : : "n" (129)); /* { dg-error "invalid operand code" } */
+ __asm__ volatile ("# %R0" : : "r" (x)); /* { dg-error "invalid operand code" } */
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-20 Jakub Jelinek <jakub@redhat.com>
PR target/79568
* config/i386/i386.c (ix86_expand_builtin): Handle
OPTION_MASK_ISA_AVX512VL and OPTION_MASK_ISA_64BIT in
ix86_builtins_isa[fcode].isa as a requirement of those
flags and any other flag in the bitmask.
(ix86_init_mmx_sse_builtins): Use 0 instead of
~OPTION_MASK_ISA_64BIT as mask.
* config/i386/i386-builtin.def (bdesc_special_args,
bdesc_args): Likewise.
* gcc.target/i386/pr79568-1.c: New test.
* gcc.target/i386/pr79568-2.c: New test.
* gcc.target/i386/pr79568-3.c: New test.
--- gcc/config/i386/i386.c (revision 245601)
+++ gcc/config/i386/i386.c (revision 245602)
@@ -32727,9 +32727,9 @@ static const struct builtin_description
/* Special builtins with variable number of arguments. */
static const struct builtin_description bdesc_special_args[] =
{
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_nothing, "__builtin_ia32_rdtsc", IX86_BUILTIN_RDTSC, UNKNOWN, (int) UINT64_FTYPE_VOID },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_nothing, "__builtin_ia32_rdtscp", IX86_BUILTIN_RDTSCP, UNKNOWN, (int) UINT64_FTYPE_PUNSIGNED },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_pause, "__builtin_ia32_pause", IX86_BUILTIN_PAUSE, UNKNOWN, (int) VOID_FTYPE_VOID },
+ { 0, CODE_FOR_nothing, "__builtin_ia32_rdtsc", IX86_BUILTIN_RDTSC, UNKNOWN, (int) UINT64_FTYPE_VOID },
+ { 0, CODE_FOR_nothing, "__builtin_ia32_rdtscp", IX86_BUILTIN_RDTSCP, UNKNOWN, (int) UINT64_FTYPE_PUNSIGNED },
+ { 0, CODE_FOR_pause, "__builtin_ia32_pause", IX86_BUILTIN_PAUSE, UNKNOWN, (int) VOID_FTYPE_VOID },
/* 80387 (for use internally for atomic compound assignment). */
{ 0, CODE_FOR_fnstenv, "__builtin_ia32_fnstenv", IX86_BUILTIN_FNSTENV, UNKNOWN, (int) VOID_FTYPE_PVOID },
@@ -33024,13 +33024,13 @@ static const struct builtin_description
/* Builtins with variable number of arguments. */
static const struct builtin_description bdesc_args[] =
{
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_bsr, "__builtin_ia32_bsrsi", IX86_BUILTIN_BSRSI, UNKNOWN, (int) INT_FTYPE_INT },
+ { 0, CODE_FOR_bsr, "__builtin_ia32_bsrsi", IX86_BUILTIN_BSRSI, UNKNOWN, (int) INT_FTYPE_INT },
{ OPTION_MASK_ISA_64BIT, CODE_FOR_bsr_rex64, "__builtin_ia32_bsrdi", IX86_BUILTIN_BSRDI, UNKNOWN, (int) INT64_FTYPE_INT64 },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_nothing, "__builtin_ia32_rdpmc", IX86_BUILTIN_RDPMC, UNKNOWN, (int) UINT64_FTYPE_INT },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_rotlqi3, "__builtin_ia32_rolqi", IX86_BUILTIN_ROLQI, UNKNOWN, (int) UINT8_FTYPE_UINT8_INT },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_rotlhi3, "__builtin_ia32_rolhi", IX86_BUILTIN_ROLHI, UNKNOWN, (int) UINT16_FTYPE_UINT16_INT },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_rotrqi3, "__builtin_ia32_rorqi", IX86_BUILTIN_RORQI, UNKNOWN, (int) UINT8_FTYPE_UINT8_INT },
- { ~OPTION_MASK_ISA_64BIT, CODE_FOR_rotrhi3, "__builtin_ia32_rorhi", IX86_BUILTIN_RORHI, UNKNOWN, (int) UINT16_FTYPE_UINT16_INT },
+ { 0, CODE_FOR_nothing, "__builtin_ia32_rdpmc", IX86_BUILTIN_RDPMC, UNKNOWN, (int) UINT64_FTYPE_INT },
+ { 0, CODE_FOR_rotlqi3, "__builtin_ia32_rolqi", IX86_BUILTIN_ROLQI, UNKNOWN, (int) UINT8_FTYPE_UINT8_INT },
+ { 0, CODE_FOR_rotlhi3, "__builtin_ia32_rolhi", IX86_BUILTIN_ROLHI, UNKNOWN, (int) UINT16_FTYPE_UINT16_INT },
+ { 0, CODE_FOR_rotrqi3, "__builtin_ia32_rorqi", IX86_BUILTIN_RORQI, UNKNOWN, (int) UINT8_FTYPE_UINT8_INT },
+ { 0, CODE_FOR_rotrhi3, "__builtin_ia32_rorhi", IX86_BUILTIN_RORHI, UNKNOWN, (int) UINT16_FTYPE_UINT16_INT },
/* MMX */
{ OPTION_MASK_ISA_MMX, CODE_FOR_mmx_addv8qi3, "__builtin_ia32_paddb", IX86_BUILTIN_PADDB, UNKNOWN, (int) V8QI_FTYPE_V8QI_V8QI },
@@ -36097,11 +36097,11 @@ ix86_init_mmx_sse_builtins (void)
IX86_BUILTIN_SBB64);
/* Read/write FLAGS. */
- def_builtin (~OPTION_MASK_ISA_64BIT, "__builtin_ia32_readeflags_u32",
+ def_builtin (0, "__builtin_ia32_readeflags_u32",
UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
def_builtin (OPTION_MASK_ISA_64BIT, "__builtin_ia32_readeflags_u64",
UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS);
- def_builtin (~OPTION_MASK_ISA_64BIT, "__builtin_ia32_writeeflags_u32",
+ def_builtin (0, "__builtin_ia32_writeeflags_u32",
VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS);
def_builtin (OPTION_MASK_ISA_64BIT, "__builtin_ia32_writeeflags_u64",
VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS);
@@ -40530,9 +40530,18 @@ ix86_expand_builtin (tree exp, rtx targe
Originally the builtin was not created if it wasn't applicable to the
current ISA based on the command line switches. With function specific
options, we need to check in the context of the function making the call
- whether it is supported. */
- if (ix86_builtins_isa[fcode].isa
- && !(ix86_builtins_isa[fcode].isa & ix86_isa_flags))
+ whether it is supported. Treat AVX512VL specially. For other flags,
+ if isa includes more than one ISA bit, treat those are requiring any
+ of them. For AVX512VL, require both AVX512VL and the non-AVX512VL
+ ISAs. Similarly for 64BIT, but we shouldn't be building such builtins
+ at all, -m64 is a whole TU option. */
+ if (((ix86_builtins_isa[fcode].isa
+ & ~(OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_64BIT))
+ && !(ix86_builtins_isa[fcode].isa
+ & ~(OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_64BIT)
+ & ix86_isa_flags))
+ || ((ix86_builtins_isa[fcode].isa & OPTION_MASK_ISA_AVX512VL)
+ && !(ix86_isa_flags & OPTION_MASK_ISA_AVX512VL)))
{
char *opts = ix86_target_string (ix86_builtins_isa[fcode].isa, 0, NULL,
NULL, (enum fpmath_unit) 0, false);
--- gcc/testsuite/gcc.target/i386/pr79568-1.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79568-1.c (revision 245602)
@@ -0,0 +1,18 @@
+/* PR target/79568 */
+/* { dg-do compile } */
+/* { dg-options "-mno-avx512vl -mavx512bw -O2" } */
+
+#pragma GCC push_options
+#pragma GCC target ("avx512vl,avx512bw")
+void
+foo (char __attribute__ ((__vector_size__(32))) *x, char __attribute__ ((__vector_size__(32))) *y, int z)
+{
+ __builtin_ia32_storedquqi256_mask (x, *y, z);
+}
+#pragma GCC pop_options
+
+void
+bar (char __attribute__ ((__vector_size__(32))) *x, char __attribute__ ((__vector_size__(32))) *y, int z)
+{
+ __builtin_ia32_storedquqi256_mask (x, *y, z); /* { dg-error "needs isa option" } */
+}
--- gcc/testsuite/gcc.target/i386/pr79568-2.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79568-2.c (revision 245602)
@@ -0,0 +1,18 @@
+/* PR target/79568 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-mno-lwp" } */
+
+#pragma GCC push_options
+#pragma GCC target ("lwp")
+void
+foo (unsigned long x, unsigned int y)
+{
+ __builtin_ia32_lwpval64 (x, y, 1);
+}
+#pragma GCC pop_options
+
+void
+bar (unsigned long x, unsigned int y)
+{
+ __builtin_ia32_lwpval64 (x, y, 1); /* { dg-error "needs isa option" } */
+}
--- gcc/testsuite/gcc.target/i386/pr79568-3.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79568-3.c (revision 245602)
@@ -0,0 +1,19 @@
+/* PR target/79568 */
+/* { dg-do compile } */
+/* { dg-options "-mno-sahf -mno-mmx -mno-sse" } */
+/* { dg-additional-options "-march=i386" { target ia32 } } */
+
+#pragma GCC push_options
+#pragma GCC target ("sse")
+void
+foo (void)
+{
+ __builtin_ia32_pause ();
+}
+#pragma GCC pop_options
+
+void
+bar (void)
+{
+ __builtin_ia32_pause ();
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-21 Jakub Jelinek <jakub@redhat.com>
PR target/79494
* config/i386/i386.c (ix86_expand_split_stack_prologue): Call
make_reg_eh_region_note_nothrow_nononlocal on call_insn.
* config/rs6000/rs6000.c: Include except.h.
(rs6000_expand_split_stack_prologue): Call
make_reg_eh_region_note_nothrow_nononlocal on the call insn.
* gcc.dg/pr79494.c: New test.
--- gcc/config/i386/i386.c (revision 245628)
+++ gcc/config/i386/i386.c (revision 245629)
@@ -14027,6 +14027,8 @@ ix86_expand_split_stack_prologue (void)
GEN_INT (UNITS_PER_WORD), constm1_rtx,
NULL_RTX, false);
add_function_usage_to (call_insn, call_fusage);
+ /* Indicate that this function can't jump to non-local gotos. */
+ make_reg_eh_region_note_nothrow_nononlocal (as_a <rtx_insn *> (call_insn));
/* In order to make call/return prediction work right, we now need
to execute a return instruction. See
--- gcc/config/rs6000/rs6000.c (revision 245628)
+++ gcc/config/rs6000/rs6000.c (revision 245629)
@@ -66,6 +66,7 @@
#include "builtins.h"
#include "context.h"
#include "tree-pass.h"
+#include "except.h"
#if TARGET_XCOFF
#include "xcoffout.h" /* get declarations of xcoff_*_section_name */
#endif
@@ -31680,6 +31681,8 @@ rs6000_expand_split_stack_prologue (void
split_stack_return use r0. */
use_reg (&call_fusage, r0);
add_function_usage_to (insn, call_fusage);
+ /* Indicate that this function can't jump to non-local gotos. */
+ make_reg_eh_region_note_nothrow_nononlocal (insn);
emit_insn (gen_frame_load (r0, r1, info->lr_save_offset));
insn = emit_move_insn (lr, r0);
add_reg_note (insn, REG_CFA_RESTORE, lr);
--- gcc/testsuite/gcc.dg/pr79494.c (nonexistent)
+++ gcc/testsuite/gcc.dg/pr79494.c (revision 245629)
@@ -0,0 +1,22 @@
+/* PR target/79494 */
+/* { dg-do compile } */
+/* { dg-require-effective-target split_stack } */
+/* { dg-options "-O2 -fsplit-stack -g" } */
+
+void
+foo (int a)
+{
+ __label__ lab;
+ __attribute__((noinline, noclone)) void bar (int b)
+ {
+ switch (b)
+ {
+ case 1:
+ goto lab;
+ case 2:
+ goto lab;
+ }
+ }
+ bar (a);
+lab:;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-21 Jakub Jelinek <jakub@redhat.com>
PR c++/79641
* c-common.c (handle_mode_attribute): Use build_qualified_type to
preserve quals.
* c-c++-common/pr79641.c: New test.
--- gcc/c-family/c-common.c (revision 245631)
+++ gcc/c-family/c-common.c (revision 245632)
@@ -7596,7 +7596,7 @@ handle_mode_attribute (tree *node, tree
return NULL_TREE;
}
- *node = typefm;
+ *node = build_qualified_type (typefm, TYPE_QUALS (type));
}
return NULL_TREE;
--- gcc/testsuite/c-c++-common/pr79641.c (nonexistent)
+++ gcc/testsuite/c-c++-common/pr79641.c (revision 245632)
@@ -0,0 +1,4 @@
+/* PR c++/79641 */
+/* { dg-do compile } */
+
+const int __attribute__((__mode__ (__QI__))) i = 0;
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-21 Jakub Jelinek <jakub@redhat.com>
PR target/79570
* sel-sched.c (moveup_expr_cached): Don't call sel_bb_head
on temporarily removed DEBUG_INSNs.
* gcc.dg/pr79570.c: New test.
--- gcc/sel-sched.c (revision 245632)
+++ gcc/sel-sched.c (revision 245633)
@@ -2529,6 +2529,7 @@ moveup_expr_cached (expr_t expr, insn_t
}
if (DEBUG_INSN_P (EXPR_INSN_RTX (expr))
+ && BLOCK_FOR_INSN (EXPR_INSN_RTX (expr))
&& (sel_bb_head (BLOCK_FOR_INSN (EXPR_INSN_RTX (expr)))
== EXPR_INSN_RTX (expr)))
/* Don't use cached information for debug insns that are heads of
--- gcc/testsuite/gcc.dg/pr79570.c (nonexistent)
+++ gcc/testsuite/gcc.dg/pr79570.c (revision 245633)
@@ -0,0 +1,6 @@
+/* PR target/79570 */
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -fselective-scheduling2 -fvar-tracking-assignments" } */
+/* { dg-warning "changes selective scheduling" "" { target *-*-* } 0 } */
+
+#include "pr69956.c"
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-21 Jakub Jelinek <jakub@redhat.com>
PR c++/79639
* constexpr.c (cxx_eval_store_expression): If *valp is a PTRMEM_CST,
call cplus_expand_constant on it first.
* g++.dg/cpp1y/constexpr-79639.C: New test.
--- gcc/cp/constexpr.c (revision 245634)
+++ gcc/cp/constexpr.c (revision 245635)
@@ -3517,11 +3517,12 @@ cxx_eval_store_expression (const constex
wants to modify it. */
if (*valp == NULL_TREE)
{
- *valp = new_ctx.ctor = build_constructor (type, NULL);
- CONSTRUCTOR_NO_IMPLICIT_ZERO (new_ctx.ctor) = no_zero_init;
+ *valp = build_constructor (type, NULL);
+ CONSTRUCTOR_NO_IMPLICIT_ZERO (*valp) = no_zero_init;
}
- else
- new_ctx.ctor = *valp;
+ else if (TREE_CODE (*valp) == PTRMEM_CST)
+ *valp = cplus_expand_constant (*valp);
+ new_ctx.ctor = *valp;
new_ctx.object = target;
}
--- gcc/testsuite/g++.dg/cpp1y/constexpr-79639.C (nonexistent)
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-79639.C (revision 245635)
@@ -0,0 +1,27 @@
+// PR c++/79639
+// { dg-do compile { target c++14 } }
+
+struct A
+{
+ void foo () {}
+ void bar () {}
+};
+typedef void (A::*T) ();
+
+constexpr T
+foo (T f)
+{
+ f = 0;
+ return f;
+}
+
+constexpr T
+bar (T f)
+{
+ f = &A::bar;
+ return f;
+}
+
+constexpr T a = foo (&A::foo);
+constexpr T b = foo (&A::foo);
+static_assert (a == nullptr, "");
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-22 Jakub Jelinek <jakub@redhat.com>
PR c++/79664
* parser.c (cp_parser_omp_teams, cp_parser_omp_target): Use
SET_EXPR_LOCATION on OMP_TARGET/OMP_TEAMS tree.
* constexpr.c (potential_constant_expression_1): Handle
OMP_*, OACC_* and CILK_* trees.
* g++.dg/cpp1y/constexpr-throw.C: Adjust expected diagnostic location.
* g++.dg/gomp/pr79664.C: New test.
--- gcc/cp/constexpr.c (revision 245661)
+++ gcc/cp/constexpr.c (revision 245662)
@@ -4985,10 +4985,40 @@ potential_constant_expression_1 (tree t,
case DELETE_EXPR:
case VEC_DELETE_EXPR:
case THROW_EXPR:
+ case OMP_PARALLEL:
+ case OMP_TASK:
+ case OMP_FOR:
+ case OMP_DISTRIBUTE:
+ case OMP_TASKLOOP:
+ case OMP_TEAMS:
+ case OMP_TARGET_DATA:
+ case OMP_TARGET:
+ case OMP_SECTIONS:
+ case OMP_ORDERED:
+ case OMP_CRITICAL:
+ case OMP_SINGLE:
+ case OMP_SECTION:
+ case OMP_MASTER:
+ case OMP_TASKGROUP:
+ case OMP_TARGET_UPDATE:
+ case OMP_TARGET_ENTER_DATA:
+ case OMP_TARGET_EXIT_DATA:
case OMP_ATOMIC:
case OMP_ATOMIC_READ:
case OMP_ATOMIC_CAPTURE_OLD:
case OMP_ATOMIC_CAPTURE_NEW:
+ case OACC_PARALLEL:
+ case OACC_KERNELS:
+ case OACC_DATA:
+ case OACC_HOST_DATA:
+ case OACC_LOOP:
+ case OACC_CACHE:
+ case OACC_DECLARE:
+ case OACC_ENTER_DATA:
+ case OACC_EXIT_DATA:
+ case OACC_UPDATE:
+ case CILK_SIMD:
+ case CILK_FOR:
/* GCC internal stuff. */
case VA_ARG_EXPR:
case OBJ_TYPE_REF:
@@ -4997,7 +5027,8 @@ potential_constant_expression_1 (tree t,
case AT_ENCODE_EXPR:
fail:
if (flags & tf_error)
- error ("expression %qE is not a constant-expression", t);
+ error_at (EXPR_LOC_OR_LOC (t, input_location),
+ "expression %qE is not a constant-expression", t);
return false;
case TYPEID_EXPR:
--- gcc/cp/parser.c (revision 245661)
+++ gcc/cp/parser.c (revision 245662)
@@ -35526,6 +35526,7 @@ cp_parser_omp_teams (cp_parser *parser,
OMP_TEAMS_CLAUSES (ret) = clauses;
OMP_TEAMS_BODY (ret) = body;
OMP_TEAMS_COMBINED (ret) = 1;
+ SET_EXPR_LOCATION (ret, loc);
return add_stmt (ret);
}
}
@@ -35547,6 +35548,7 @@ cp_parser_omp_teams (cp_parser *parser,
TREE_TYPE (stmt) = void_type_node;
OMP_TEAMS_CLAUSES (stmt) = clauses;
OMP_TEAMS_BODY (stmt) = cp_parser_omp_structured_block (parser, if_p);
+ SET_EXPR_LOCATION (stmt, loc);
return add_stmt (stmt);
}
@@ -35965,6 +35967,7 @@ cp_parser_omp_target (cp_parser *parser,
OMP_TARGET_CLAUSES (stmt) = cclauses[C_OMP_CLAUSE_SPLIT_TARGET];
OMP_TARGET_BODY (stmt) = body;
OMP_TARGET_COMBINED (stmt) = 1;
+ SET_EXPR_LOCATION (stmt, pragma_tok->location);
add_stmt (stmt);
pc = &OMP_TARGET_CLAUSES (stmt);
goto check_clauses;
--- gcc/testsuite/g++.dg/gomp/pr79664.C (nonexistent)
+++ gcc/testsuite/g++.dg/gomp/pr79664.C (revision 245662)
@@ -0,0 +1,168 @@
+// PR c++/79664
+// { dg-do compile }
+// { dg-options "-std=c++14 -fopenmp" }
+
+constexpr int
+f1 ()
+{
+ int i = 0;
+#pragma omp parallel for // { dg-error "is not a constant-expression" }
+ for (i = 0; i < 10; ++i)
+ ;
+ return 0;
+}
+
+constexpr int
+f2 ()
+{
+ int i = 0;
+#pragma omp parallel // { dg-error "is not a constant-expression" }
+ i = 5;
+ return 0;
+}
+
+constexpr int
+f3 ()
+{
+ int i = 0;
+#pragma omp task // { dg-error "is not a constant-expression" }
+ i = 5;
+ return 0;
+}
+
+constexpr int
+f4 ()
+{
+ int i = 0;
+#pragma omp for // { dg-error "is not a constant-expression" }
+ for (i = 0; i < 10; ++i)
+ ;
+ return 0;
+}
+
+constexpr int
+f5 ()
+{
+ int i = 0;
+#pragma omp taskloop // { dg-error "is not a constant-expression" }
+ for (i = 0; i < 10; ++i)
+ ;
+ return 0;
+}
+
+constexpr int
+f6 ()
+{
+ int i = 0;
+#pragma omp target teams // { dg-error "is not a constant-expression" }
+ i = 5;
+ return 0;
+}
+
+constexpr int
+f7 ()
+{
+ int i = 0;
+#pragma omp target data map(tofrom:i) // { dg-error "is not a constant-expression" }
+ i = 5;
+ return 0;
+}
+
+constexpr int
+f8 ()
+{
+ int i = 0;
+#pragma omp target // { dg-error "is not a constant-expression" }
+ i = 5;
+ return 0;
+}
+
+constexpr int
+f9 ()
+{
+ int i = 0;
+#pragma omp sections // { dg-error "is not a constant-expression" }
+ {
+#pragma omp section
+ i = 5;
+ }
+ return 0;
+}
+
+constexpr int
+f10 ()
+{
+ int i = 0;
+#pragma omp ordered // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f11 ()
+{
+ int i = 0;
+#pragma omp critical // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f12 ()
+{
+ int i = 0;
+#pragma omp single // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f13 ()
+{
+ int i = 0;
+#pragma omp master // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f14 ()
+{
+ int i = 0;
+#pragma omp taskgroup // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f15 ()
+{
+ int i = 0;
+#pragma omp target update to(i) // { dg-error "is not a constant-expression" }
+ i = 1;
+ return 0;
+}
+
+constexpr int
+f16 ()
+{
+ int i = 0;
+#pragma omp target update to(i) // { dg-error "is not a constant-expression" }
+ return 0;
+}
+
+constexpr int
+f17 ()
+{
+ int i = 0;
+#pragma omp target enter data map(to:i) // { dg-error "is not a constant-expression" }
+ return 0;
+}
+
+constexpr int
+f18 ()
+{
+ int i = 0;
+#pragma omp target exit data map(from:i) // { dg-error "is not a constant-expression" }
+ return 0;
+}
--- gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C 2017-05-05 19:38:28.000000000 +0200
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C 2017-05-05 23:17:36.875516561 +0200
@@ -7,19 +7,19 @@ constexpr void f1() {
constexpr void f2() {
if (true)
- throw;
-} // { dg-error "not a constant-expression" }
+ throw; // { dg-error "not a constant-expression" }
+}
constexpr void f3() {
if (false)
;
else
- throw;
-}// { dg-error "not a constant-expression" }
+ throw; // { dg-error "not a constant-expression" }
+}
constexpr void f4() {
- throw;
-}// { dg-error "not a constant-expression" }
+ throw; // { dg-error "not a constant-expression" }
+}
constexpr int fun(int n) {
switch (n) {
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-25 Jakub Jelinek <jakub@redhat.com>
PR middle-end/79396
* tree-eh.c (operation_could_trap_p, stmt_could_throw_1_p): Handle
FMA_EXPR like tcc_binary or tcc_unary.
* g++.dg/opt/pr79396.C: New test.
--- gcc/tree-eh.c (revision 245734)
+++ gcc/tree-eh.c (revision 245735)
@@ -2513,7 +2513,8 @@ operation_could_trap_p (enum tree_code o
if (TREE_CODE_CLASS (op) != tcc_comparison
&& TREE_CODE_CLASS (op) != tcc_unary
- && TREE_CODE_CLASS (op) != tcc_binary)
+ && TREE_CODE_CLASS (op) != tcc_binary
+ && op != FMA_EXPR)
return false;
return operation_could_trap_helper_p (op, fp_operation, honor_trapv,
@@ -2738,7 +2739,8 @@ stmt_could_throw_1_p (gimple *stmt)
if (TREE_CODE_CLASS (code) == tcc_comparison
|| TREE_CODE_CLASS (code) == tcc_unary
- || TREE_CODE_CLASS (code) == tcc_binary)
+ || TREE_CODE_CLASS (code) == tcc_binary
+ || code == FMA_EXPR)
{
if (is_gimple_assign (stmt)
&& TREE_CODE_CLASS (code) == tcc_comparison)
--- gcc/testsuite/g++.dg/opt/pr79396.C (nonexistent)
+++ gcc/testsuite/g++.dg/opt/pr79396.C (revision 245735)
@@ -0,0 +1,13 @@
+// PR middle-end/79396
+// { dg-do compile }
+// { dg-options "-fnon-call-exceptions -O2" }
+// { dg-additional-options "-mfma" { target i?86-*-* x86_64-*-* } }
+
+struct A { A (); ~A (); };
+
+float
+foo (float x)
+{
+ A a;
+ return __builtin_pow (x, 2) + 2;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-02-28 Jakub Jelinek <jakub@redhat.com>
PR target/79729
* config/i386/i386.c (ix86_print_operand) <case 'R'>: Replace
gcc_unreachable with output_operand_lossage.
* gcc.target/i386/pr79729.c: New test.
--- gcc/config/i386/i386.c (revision 245780)
+++ gcc/config/i386/i386.c (revision 245781)
@@ -18234,7 +18234,8 @@ ix86_print_operand (FILE *file, rtx x, i
fputs ("{rz-sae}", file);
break;
default:
- gcc_unreachable ();
+ output_operand_lossage ("operand is not a specific integer, "
+ "invalid operand code 'R'");
}
if (ASSEMBLER_DIALECT == ASM_ATT)
--- gcc/testsuite/gcc.target/i386/pr79729.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79729.c (revision 245781)
@@ -0,0 +1,8 @@
+/* PR target/79729 */
+/* { dg-do compile } */
+
+void
+foo (int x)
+{
+ __asm__ volatile ("# %R0" : : "n" (129)); /* { dg-error "invalid operand code" } */
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-01 Jakub Jelinek <jakub@redhat.com>
PR c++/79681
* fold-const.c (make_bit_field_ref): If orig_inner is COMPONENT_REF,
attempt to use its first operand as BIT_FIELD_REF base.
* g++.dg/cpp1y/constexpr-79681-1.C: New test.
* g++.dg/cpp1y/constexpr-79681-2.C: New test.
--- gcc/fold-const.c (revision 245803)
+++ gcc/fold-const.c (revision 245804)
@@ -3801,6 +3801,31 @@ make_bit_field_ref (location_t loc, tree
{
tree result, bftype;
+ /* Attempt not to lose the access path if possible. */
+ if (TREE_CODE (orig_inner) == COMPONENT_REF)
+ {
+ tree ninner = TREE_OPERAND (orig_inner, 0);
+ machine_mode nmode;
+ HOST_WIDE_INT nbitsize, nbitpos;
+ tree noffset;
+ int nunsignedp, nreversep, nvolatilep = 0;
+ tree base = get_inner_reference (ninner, &nbitsize, &nbitpos,
+ &noffset, &nmode, &nunsignedp,
+ &nreversep, &nvolatilep, false);
+ if (base == inner
+ && noffset == NULL_TREE
+ && nbitsize >= bitsize
+ && nbitpos <= bitpos
+ && bitpos + bitsize <= nbitpos + nbitsize
+ && !reversep
+ && !nreversep
+ && !nvolatilep)
+ {
+ inner = ninner;
+ bitpos -= nbitpos;
+ }
+ }
+
alias_set_type iset = get_alias_set (orig_inner);
if (iset == 0 && get_alias_set (inner) != iset)
inner = fold_build2 (MEM_REF, TREE_TYPE (inner),
--- gcc/testsuite/g++.dg/cpp1y/constexpr-79681-1.C (nonexistent)
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-79681-1.C (revision 245804)
@@ -0,0 +1,17 @@
+// PR c++/79681
+// { dg-do compile { target c++14 } }
+// { dg-options "-O2" }
+
+struct A
+{
+ int i : 4;
+};
+
+constexpr bool
+foo ()
+{
+ A x[] = { 1 };
+ return x[0].i;
+}
+
+static_assert (foo(), "");
--- gcc/testsuite/g++.dg/cpp1y/constexpr-79681-2.C (nonexistent)
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-79681-2.C (revision 245804)
@@ -0,0 +1,39 @@
+// PR c++/79681
+// { dg-do compile { target c++14 } }
+// { dg-options "-O2" }
+
+struct A
+{
+ char i : 4;
+ char k : 1;
+ char l : 3;
+};
+struct B
+{
+ char j : 4;
+};
+struct C
+{
+ long long u;
+ A a[1];
+ B b[1];
+};
+
+constexpr bool
+foo ()
+{
+ C c = { 0, { { 5, 0, 2 } }, { { 6 } } };
+ C d = { 0, { { 6, 0, 1 } }, { { 5 } } };
+ return c.a[0].i == d.a[0].i && c.b[0].j == d.b[0].j;
+}
+
+constexpr bool
+bar ()
+{
+ C c = { 0, { { 5, 0, 2 } }, { { 6 } } };
+ C d = { 0, { { 6, 0, 1 } }, { { 5 } } };
+ return c.a[0].i == d.a[0].i && c.a[0].l == d.a[0].l;
+}
+
+static_assert (foo () == false, "");
+static_assert (bar () == false, "");
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-03 Jakub Jelinek <jakub@redhat.com>
PR target/79807
* config/i386/i386.c (ix86_expand_multi_arg_builtin): If target
is a memory operand, increase num_memory.
(ix86_expand_args_builtin): Likewise.
* gcc.target/i386/pr79807.c: New test.
--- gcc/config/i386/i386.c (revision 245870)
+++ gcc/config/i386/i386.c (revision 245871)
@@ -34249,6 +34249,8 @@ ix86_expand_multi_arg_builtin (enum insn
|| GET_MODE (target) != tmode
|| !insn_data[icode].operand[0].predicate (target, tmode))
target = gen_reg_rtx (tmode);
+ else if (memory_operand (target, tmode))
+ num_memory++;
gcc_assert (nargs <= 4);
@@ -35534,6 +35536,8 @@ ix86_expand_args_builtin (const struct b
|| GET_MODE (target) != tmode
|| !insn_p->operand[0].predicate (target, tmode))
target = gen_reg_rtx (tmode);
+ else if (memory_operand (target, tmode))
+ num_memory++;
real_target = target;
}
else
--- gcc/testsuite/gcc.target/i386/pr79807.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79807.c (revision 245871)
@@ -0,0 +1,12 @@
+/* PR target/79807 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx -ffloat-store" } */
+
+typedef double __v2df __attribute__ ((__vector_size__ (16)));
+typedef double __v4df __attribute__ ((__vector_size__ (32)));
+
+__v2df
+foo (__v4df x)
+{
+ return __builtin_ia32_pd_pd256 (x);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-07 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/79901
* expr.c (expand_expr_real_2): For vector MIN/MAX, if there is no
min/max expander, expand it using expand_vec_cond_expr.
--- gcc/expr.c (revision 245945)
+++ gcc/expr.c (revision 245946)
@@ -8943,6 +8943,18 @@ expand_expr_real_2 (sepops ops, rtx targ
if (temp != 0)
return temp;
+ /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
+ and similarly for MAX <x, y>. */
+ if (VECTOR_TYPE_P (type))
+ {
+ tree t0 = make_tree (type, op0);
+ tree t1 = make_tree (type, op1);
+ tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
+ type, t0, t1);
+ return expand_vec_cond_expr (type, comparison, t0, t1,
+ original_target);
+ }
+
/* At this point, a MEM target is no longer useful; we will get better
code without it. */
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-07 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/79901
* config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to
...
(*avx512f_<code><mode>3<mask_name>): ... this.
(<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F
iterator instead of VI8_AVX2_AVX512BW.
* gcc.target/i386/pr79901.c: New test.
--- gcc/config/i386/sse.md (revision 245946)
+++ gcc/config/i386/sse.md (revision 245947)
@@ -10841,7 +10841,7 @@ (define_expand "<code><mode>3_mask"
"TARGET_AVX512F"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
-(define_insn "*avx512bw_<code><mode>3<mask_name>"
+(define_insn "*avx512f_<code><mode>3<mask_name>"
[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
(maxmin:VI48_AVX512VL
(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
@@ -10865,10 +10865,10 @@ (define_insn "<mask_codefor><code><mode>
(set_attr "mode" "<sseinsnmode>")])
(define_expand "<code><mode>3"
- [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
- (maxmin:VI8_AVX2_AVX512BW
- (match_operand:VI8_AVX2_AVX512BW 1 "register_operand")
- (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))]
+ [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
+ (maxmin:VI8_AVX2_AVX512F
+ (match_operand:VI8_AVX2_AVX512F 1 "register_operand")
+ (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
"TARGET_SSE4_2"
{
if (TARGET_AVX512F
--- gcc/testsuite/gcc.target/i386/pr79901.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79901.c (revision 245947)
@@ -0,0 +1,22 @@
+/* PR rtl-optimization/79901 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f -fno-ssa-phiopt" } */
+
+unsigned int
+foo (const unsigned long long x)
+{
+ if (x < 0)
+ return 0;
+ else if ( x > ~0U)
+ return ~0U;
+ else
+ return (unsigned int) x;
+}
+
+void
+bar (unsigned x, unsigned int *y, unsigned int z)
+{
+ unsigned i;
+ for (i = 0; i < x; i++)
+ y[i] = foo (y[i] * (unsigned long long) z);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-08 Jakub Jelinek <jakub@redhat.com>
PR c/79940
* gimplify.c (gimplify_omp_for): Replace index var in outer
taskloop statement with an artificial variable and add
OMP_CLAUSE_PRIVATE clause for it.
* testsuite/libgomp.c/pr79940.c: New test.
--- gcc/gimplify.c (revision 245979)
+++ gcc/gimplify.c (revision 245980)
@@ -10232,8 +10232,9 @@ gimplify_omp_for (tree *expr_p, gimple_s
gimple_omp_for_set_combined_into_p (gfor, true);
for (i = 0; i < (int) gimple_omp_for_collapse (gfor); i++)
{
- t = unshare_expr (gimple_omp_for_index (gfor, i));
- gimple_omp_for_set_index (gforo, i, t);
+ tree type = TREE_TYPE (gimple_omp_for_index (gfor, i));
+ tree v = create_tmp_var (type);
+ gimple_omp_for_set_index (gforo, i, v);
t = unshare_expr (gimple_omp_for_initial (gfor, i));
gimple_omp_for_set_initial (gforo, i, t);
gimple_omp_for_set_cond (gforo, i,
@@ -10241,7 +10242,13 @@ gimplify_omp_for (tree *expr_p, gimple_s
t = unshare_expr (gimple_omp_for_final (gfor, i));
gimple_omp_for_set_final (gforo, i, t);
t = unshare_expr (gimple_omp_for_incr (gfor, i));
+ gcc_assert (TREE_OPERAND (t, 0) == gimple_omp_for_index (gfor, i));
+ TREE_OPERAND (t, 0) = v;
gimple_omp_for_set_incr (gforo, i, t);
+ t = build_omp_clause (input_location, OMP_CLAUSE_PRIVATE);
+ OMP_CLAUSE_DECL (t) = v;
+ OMP_CLAUSE_CHAIN (t) = gimple_omp_for_clauses (gforo);
+ gimple_omp_for_set_clauses (gforo, t);
}
gimplify_seq_add_stmt (pre_p, gforo);
}
--- libgomp/testsuite/libgomp.c/pr79940.c (nonexistent)
+++ libgomp/testsuite/libgomp.c/pr79940.c (revision 245980)
@@ -0,0 +1,47 @@
+/* PR c/79940 */
+
+int
+main ()
+{
+ int i, j, l, m;
+ int a[10000], b[10000], c[10000];
+ for (i = 0; i < 10000; i++)
+ {
+ a[i] = i;
+ b[i] = i & 31;
+ }
+#pragma omp parallel shared(a, b, c)
+#pragma omp single
+#pragma omp taskloop shared(a, b, c)
+ for (i = 0; i < 10000; i++)
+ c[i] = a[i] + b[i];
+#pragma omp parallel
+#pragma omp single
+ {
+ #pragma omp taskloop shared(a, b, c) lastprivate (i)
+ for (i = 0; i < 10000; i++)
+ c[i] += a[i] + b[i];
+ l = i;
+ }
+#pragma omp parallel
+#pragma omp single
+#pragma omp taskloop shared(a, b, c) collapse(2)
+ for (i = 0; i < 100; i++)
+ for (j = 0; j < 100; j++)
+ c[i * 100 + j] += a[i * 100 + j] + b[i * 100 + j];
+#pragma omp parallel
+#pragma omp single
+ {
+ #pragma omp taskloop shared(a, b, c) lastprivate (i, j)
+ for (i = 0; i < 100; i++)
+ for (j = 0; j < 100; j++)
+ c[i * 100 + j] += a[i * 100 + j] + b[i * 100 + j];
+ m = i * 100 + j;
+ }
+ for (i = 0; i < 10000; i++)
+ if (a[i] != i || b[i] != (i & 31) || c[i] != 4 * i + 4 * (i & 31))
+ __builtin_abort ();
+ if (l != 10000 || m != 10100)
+ __builtin_abort ();
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-09 Jakub Jelinek <jakub@redhat.com>
PR target/79932
* config/i386/avx512bwintrin.h (_mm512_packs_epi32,
_mm512_maskz_packs_epi32, _mm512_mask_packs_epi32,
_mm512_packus_epi32, _mm512_maskz_packus_epi32,
_mm512_mask_packus_epi32): Move definitions outside of __OPTIMIZE__
guarded section.
* gcc.target/i386/pr79932-1.c: New test.
--- gcc/config/i386/avx512bwintrin.h (revision 245988)
+++ gcc/config/i386/avx512bwintrin.h (revision 245989)
@@ -2420,6 +2420,72 @@ _mm512_cmple_epi16_mask (__m512i __X, __
(__mmask32) -1);
}
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_packs_epi32 (__m512i __A, __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi)
+ _mm512_setzero_hi (),
+ (__mmask32) -1);
+}
+
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_packs_epi32 (__mmask32 __M, __m512i __A, __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi)
+ _mm512_setzero_hi (),
+ __M);
+}
+
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_packs_epi32 (__m512i __W, __mmask32 __M, __m512i __A,
+ __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi) __W,
+ __M);
+}
+
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_packus_epi32 (__m512i __A, __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi)
+ _mm512_setzero_hi (),
+ (__mmask32) -1);
+}
+
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_packus_epi32 (__mmask32 __M, __m512i __A, __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi)
+ _mm512_setzero_hi (),
+ __M);
+}
+
+extern __inline __m512i
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_packus_epi32 (__m512i __W, __mmask32 __M, __m512i __A,
+ __m512i __B)
+{
+ return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
+ (__v16si) __B,
+ (__v32hi) __W,
+ __M);
+}
+
#ifdef __OPTIMIZE__
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -2744,72 +2810,6 @@ _mm512_cmp_epu8_mask (__m512i __X, __m51
}
extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_packs_epi32 (__m512i __A, __m512i __B)
-{
- return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi)
- _mm512_setzero_hi (),
- (__mmask32) -1);
-}
-
-extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_packs_epi32 (__mmask32 __M, __m512i __A, __m512i __B)
-{
- return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi)
- _mm512_setzero_hi(),
- __M);
-}
-
-extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_packs_epi32 (__m512i __W, __mmask32 __M, __m512i __A,
- __m512i __B)
-{
- return (__m512i) __builtin_ia32_packssdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi) __W,
- __M);
-}
-
-extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_packus_epi32 (__m512i __A, __m512i __B)
-{
- return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi)
- _mm512_setzero_hi (),
- (__mmask32) -1);
-}
-
-extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_maskz_packus_epi32 (__mmask32 __M, __m512i __A, __m512i __B)
-{
- return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi)
- _mm512_setzero_hi(),
- __M);
-}
-
-extern __inline __m512i
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm512_mask_packus_epi32 (__m512i __W, __mmask32 __M, __m512i __A,
- __m512i __B)
-{
- return (__m512i) __builtin_ia32_packusdw512_mask ((__v16si) __A,
- (__v16si) __B,
- (__v32hi) __W,
- __M);
-}
-
-extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_bslli_epi128 (__m512i __A, const int __N)
{
--- gcc/testsuite/gcc.target/i386/pr79932-1.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79932-1.c (revision 245989)
@@ -0,0 +1,19 @@
+/* PR target/79932 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512bw" } */
+
+#include <x86intrin.h>
+
+__m512i a, b, c, d, e, f, g, h, i;
+__mmask32 m;
+
+void
+foo (void)
+{
+ d = _mm512_packs_epi32 (a, b);
+ e = _mm512_maskz_packs_epi32 (m, a, b);
+ f = _mm512_mask_packs_epi32 (c, m, a, b);
+ g = _mm512_packus_epi32 (a, b);
+ h = _mm512_maskz_packus_epi32 (m, a, b);
+ i = _mm512_mask_packus_epi32 (c, m, a, b);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-09 Jakub Jelinek <jakub@redhat.com>
PR target/79932
* config/i386/avx512vlintrin.h (_mm256_cmpge_epi32_mask,
_mm256_cmpge_epi64_mask, _mm256_cmpge_epu32_mask,
_mm256_cmpge_epu64_mask, _mm256_cmple_epi32_mask,
_mm256_cmple_epi64_mask, _mm256_cmple_epu32_mask,
_mm256_cmple_epu64_mask, _mm256_cmplt_epi32_mask,
_mm256_cmplt_epi64_mask, _mm256_cmplt_epu32_mask,
_mm256_cmplt_epu64_mask, _mm256_cmpneq_epi32_mask,
_mm256_cmpneq_epi64_mask, _mm256_cmpneq_epu32_mask,
_mm256_cmpneq_epu64_mask, _mm256_mask_cmpge_epi32_mask,
_mm256_mask_cmpge_epi64_mask, _mm256_mask_cmpge_epu32_mask,
_mm256_mask_cmpge_epu64_mask, _mm256_mask_cmple_epi32_mask,
_mm256_mask_cmple_epi64_mask, _mm256_mask_cmple_epu32_mask,
_mm256_mask_cmple_epu64_mask, _mm256_mask_cmplt_epi32_mask,
_mm256_mask_cmplt_epi64_mask, _mm256_mask_cmplt_epu32_mask,
_mm256_mask_cmplt_epu64_mask, _mm256_mask_cmpneq_epi32_mask,
_mm256_mask_cmpneq_epi64_mask, _mm256_mask_cmpneq_epu32_mask,
_mm256_mask_cmpneq_epu64_mask, _mm_cmpge_epi32_mask,
_mm_cmpge_epi64_mask, _mm_cmpge_epu32_mask, _mm_cmpge_epu64_mask,
_mm_cmple_epi32_mask, _mm_cmple_epi64_mask, _mm_cmple_epu32_mask,
_mm_cmple_epu64_mask, _mm_cmplt_epi32_mask, _mm_cmplt_epi64_mask,
_mm_cmplt_epu32_mask, _mm_cmplt_epu64_mask, _mm_cmpneq_epi32_mask,
_mm_cmpneq_epi64_mask, _mm_cmpneq_epu32_mask, _mm_cmpneq_epu64_mask,
_mm_mask_cmpge_epi32_mask, _mm_mask_cmpge_epi64_mask,
_mm_mask_cmpge_epu32_mask, _mm_mask_cmpge_epu64_mask,
_mm_mask_cmple_epi32_mask, _mm_mask_cmple_epi64_mask,
_mm_mask_cmple_epu32_mask, _mm_mask_cmple_epu64_mask,
_mm_mask_cmplt_epi32_mask, _mm_mask_cmplt_epi64_mask,
_mm_mask_cmplt_epu32_mask, _mm_mask_cmplt_epu64_mask,
_mm_mask_cmpneq_epi32_mask, _mm_mask_cmpneq_epi64_mask,
_mm_mask_cmpneq_epu32_mask, _mm_mask_cmpneq_epu64_mask): Move
definitions outside of __OPTIMIZE__ guarded section.
* gcc.target/i386/pr79932-2.c: New test.
--- gcc/config/i386/avx512vlintrin.h (revision 245989)
+++ gcc/config/i386/avx512vlintrin.h (revision 245990)
@@ -9172,6 +9172,582 @@ _mm256_mask_permutexvar_epi32 (__m256i _
__M);
}
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmple_epu32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmple_epu64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmple_epi32_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmple_epi64_mask (__m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epu32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_epu32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_epu32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epu64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_epu64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_epu64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epi32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_epi32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_epi32_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmplt_epi64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpge_epi64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmple_epi64_mask (__m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) -1);
+}
+
#ifdef __OPTIMIZE__
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -11784,582 +12360,6 @@ _mm256_permutex_pd (__m256d __X, const i
(__mmask8) -1);
}
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpneq_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmplt_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpge_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmple_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmple_epu32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpneq_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmplt_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpge_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmple_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmple_epu64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpneq_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmplt_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpge_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmple_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmple_epi32_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
- (__v8si) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpneq_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmplt_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmpge_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_cmple_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_cmple_epi64_mask (__m256i __X, __m256i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
- (__v4di) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpneq_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmplt_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmplt_epu32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpge_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpge_epu32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmple_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmple_epu32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpneq_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmplt_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmplt_epu64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpge_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpge_epu64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmple_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmple_epu64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpneq_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmplt_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmplt_epi32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpge_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpge_epi32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmple_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmple_epi32_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
- (__v4si) __Y, 2,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpneq_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 4,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 4,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmplt_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 1,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmplt_epi64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 1,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmpge_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 5,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmpge_epi64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 5,
- (__mmask8) -1);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mask_cmple_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 2,
- (__mmask8) __M);
-}
-
-extern __inline __mmask8
- __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm_cmple_epi64_mask (__m128i __X, __m128i __Y)
-{
- return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
- (__v2di) __Y, 2,
- (__mmask8) -1);
-}
-
#else
#define _mm256_permutex_pd(X, M) \
((__m256d) __builtin_ia32_permdf256_mask ((__v4df)(__m256d)(X), (int)(M), \
--- gcc/testsuite/gcc.target/i386/pr79932-2.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr79932-2.c (revision 245990)
@@ -0,0 +1,78 @@
+/* PR target/79932 */
+/* { dg-do compile } */
+/* { dg-options "-O0 -mavx512vl" } */
+
+#include <x86intrin.h>
+
+__m256i a, b;
+__m128i c, d;
+__mmask32 e, f[64];
+
+void
+foo (void)
+{
+ f[0] = _mm256_cmpge_epi32_mask (a, b);
+ f[1] = _mm256_cmpge_epi64_mask (a, b);
+ f[2] = _mm256_cmpge_epu32_mask (a, b);
+ f[3] = _mm256_cmpge_epu64_mask (a, b);
+ f[4] = _mm256_cmple_epi32_mask (a, b);
+ f[5] = _mm256_cmple_epi64_mask (a, b);
+ f[6] = _mm256_cmple_epu32_mask (a, b);
+ f[7] = _mm256_cmple_epu64_mask (a, b);
+ f[8] = _mm256_cmplt_epi32_mask (a, b);
+ f[9] = _mm256_cmplt_epi64_mask (a, b);
+ f[10] = _mm256_cmplt_epu32_mask (a, b);
+ f[11] = _mm256_cmplt_epu64_mask (a, b);
+ f[12] = _mm256_cmpneq_epi32_mask (a, b);
+ f[13] = _mm256_cmpneq_epi64_mask (a, b);
+ f[14] = _mm256_cmpneq_epu32_mask (a, b);
+ f[15] = _mm256_cmpneq_epu64_mask (a, b);
+ f[16] = _mm256_mask_cmpge_epi32_mask (e, a, b);
+ f[17] = _mm256_mask_cmpge_epi64_mask (e, a, b);
+ f[18] = _mm256_mask_cmpge_epu32_mask (e, a, b);
+ f[19] = _mm256_mask_cmpge_epu64_mask (e, a, b);
+ f[20] = _mm256_mask_cmple_epi32_mask (e, a, b);
+ f[21] = _mm256_mask_cmple_epi64_mask (e, a, b);
+ f[22] = _mm256_mask_cmple_epu32_mask (e, a, b);
+ f[23] = _mm256_mask_cmple_epu64_mask (e, a, b);
+ f[24] = _mm256_mask_cmplt_epi32_mask (e, a, b);
+ f[25] = _mm256_mask_cmplt_epi64_mask (e, a, b);
+ f[26] = _mm256_mask_cmplt_epu32_mask (e, a, b);
+ f[27] = _mm256_mask_cmplt_epu64_mask (e, a, b);
+ f[28] = _mm256_mask_cmpneq_epi32_mask (e, a, b);
+ f[29] = _mm256_mask_cmpneq_epi64_mask (e, a, b);
+ f[30] = _mm256_mask_cmpneq_epu32_mask (e, a, b);
+ f[31] = _mm256_mask_cmpneq_epu64_mask (e, a, b);
+ f[32] = _mm_cmpge_epi32_mask (c, d);
+ f[33] = _mm_cmpge_epi64_mask (c, d);
+ f[34] = _mm_cmpge_epu32_mask (c, d);
+ f[35] = _mm_cmpge_epu64_mask (c, d);
+ f[36] = _mm_cmple_epi32_mask (c, d);
+ f[37] = _mm_cmple_epi64_mask (c, d);
+ f[38] = _mm_cmple_epu32_mask (c, d);
+ f[39] = _mm_cmple_epu64_mask (c, d);
+ f[40] = _mm_cmplt_epi32_mask (c, d);
+ f[41] = _mm_cmplt_epi64_mask (c, d);
+ f[42] = _mm_cmplt_epu32_mask (c, d);
+ f[43] = _mm_cmplt_epu64_mask (c, d);
+ f[44] = _mm_cmpneq_epi32_mask (c, d);
+ f[45] = _mm_cmpneq_epi64_mask (c, d);
+ f[46] = _mm_cmpneq_epu32_mask (c, d);
+ f[47] = _mm_cmpneq_epu64_mask (c, d);
+ f[48] = _mm_mask_cmpge_epi32_mask (e, c, d);
+ f[49] = _mm_mask_cmpge_epi64_mask (e, c, d);
+ f[50] = _mm_mask_cmpge_epu32_mask (e, c, d);
+ f[51] = _mm_mask_cmpge_epu64_mask (e, c, d);
+ f[52] = _mm_mask_cmple_epi32_mask (e, c, d);
+ f[53] = _mm_mask_cmple_epi64_mask (e, c, d);
+ f[54] = _mm_mask_cmple_epu32_mask (e, c, d);
+ f[55] = _mm_mask_cmple_epu64_mask (e, c, d);
+ f[56] = _mm_mask_cmplt_epi32_mask (e, c, d);
+ f[57] = _mm_mask_cmplt_epi64_mask (e, c, d);
+ f[58] = _mm_mask_cmplt_epu32_mask (e, c, d);
+ f[59] = _mm_mask_cmplt_epu64_mask (e, c, d);
+ f[60] = _mm_mask_cmpneq_epi32_mask (e, c, d);
+ f[61] = _mm_mask_cmpneq_epi64_mask (e, c, d);
+ f[62] = _mm_mask_cmpneq_epu32_mask (e, c, d);
+ f[63] = _mm_mask_cmpneq_epu64_mask (e, c, d);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-09 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/79944
* asan.c (get_mem_refs_of_builtin_call): For BUILT_IN_ATOMIC* and
BUILT_IN_SYNC*, determine the access type from the size suffix and
always build a MEM_REF with that type. Handle forgotten
BUILT_IN_SYNC_FETCH_AND_NAND_16 and BUILT_IN_SYNC_NAND_AND_FETCH_16.
* c-c++-common/asan/pr79944.c: New test.
--- gcc/asan.c (revision 245990)
+++ gcc/asan.c (revision 245991)
@@ -603,218 +603,208 @@ get_mem_refs_of_builtin_call (const gcal
case BUILT_IN_STRLEN:
source0 = gimple_call_arg (call, 0);
len = gimple_call_lhs (call);
- break ;
+ break;
/* And now the __atomic* and __sync builtins.
These are handled differently from the classical memory memory
access builtins above. */
case BUILT_IN_ATOMIC_LOAD_1:
- case BUILT_IN_ATOMIC_LOAD_2:
- case BUILT_IN_ATOMIC_LOAD_4:
- case BUILT_IN_ATOMIC_LOAD_8:
- case BUILT_IN_ATOMIC_LOAD_16:
is_store = false;
- /* fall through. */
-
+ /* FALLTHRU */
case BUILT_IN_SYNC_FETCH_AND_ADD_1:
- case BUILT_IN_SYNC_FETCH_AND_ADD_2:
- case BUILT_IN_SYNC_FETCH_AND_ADD_4:
- case BUILT_IN_SYNC_FETCH_AND_ADD_8:
- case BUILT_IN_SYNC_FETCH_AND_ADD_16:
-
case BUILT_IN_SYNC_FETCH_AND_SUB_1:
- case BUILT_IN_SYNC_FETCH_AND_SUB_2:
- case BUILT_IN_SYNC_FETCH_AND_SUB_4:
- case BUILT_IN_SYNC_FETCH_AND_SUB_8:
- case BUILT_IN_SYNC_FETCH_AND_SUB_16:
-
case BUILT_IN_SYNC_FETCH_AND_OR_1:
- case BUILT_IN_SYNC_FETCH_AND_OR_2:
- case BUILT_IN_SYNC_FETCH_AND_OR_4:
- case BUILT_IN_SYNC_FETCH_AND_OR_8:
- case BUILT_IN_SYNC_FETCH_AND_OR_16:
-
case BUILT_IN_SYNC_FETCH_AND_AND_1:
- case BUILT_IN_SYNC_FETCH_AND_AND_2:
- case BUILT_IN_SYNC_FETCH_AND_AND_4:
- case BUILT_IN_SYNC_FETCH_AND_AND_8:
- case BUILT_IN_SYNC_FETCH_AND_AND_16:
-
case BUILT_IN_SYNC_FETCH_AND_XOR_1:
- case BUILT_IN_SYNC_FETCH_AND_XOR_2:
- case BUILT_IN_SYNC_FETCH_AND_XOR_4:
- case BUILT_IN_SYNC_FETCH_AND_XOR_8:
- case BUILT_IN_SYNC_FETCH_AND_XOR_16:
-
case BUILT_IN_SYNC_FETCH_AND_NAND_1:
- case BUILT_IN_SYNC_FETCH_AND_NAND_2:
- case BUILT_IN_SYNC_FETCH_AND_NAND_4:
- case BUILT_IN_SYNC_FETCH_AND_NAND_8:
-
case BUILT_IN_SYNC_ADD_AND_FETCH_1:
- case BUILT_IN_SYNC_ADD_AND_FETCH_2:
- case BUILT_IN_SYNC_ADD_AND_FETCH_4:
- case BUILT_IN_SYNC_ADD_AND_FETCH_8:
- case BUILT_IN_SYNC_ADD_AND_FETCH_16:
-
case BUILT_IN_SYNC_SUB_AND_FETCH_1:
- case BUILT_IN_SYNC_SUB_AND_FETCH_2:
- case BUILT_IN_SYNC_SUB_AND_FETCH_4:
- case BUILT_IN_SYNC_SUB_AND_FETCH_8:
- case BUILT_IN_SYNC_SUB_AND_FETCH_16:
-
case BUILT_IN_SYNC_OR_AND_FETCH_1:
- case BUILT_IN_SYNC_OR_AND_FETCH_2:
- case BUILT_IN_SYNC_OR_AND_FETCH_4:
- case BUILT_IN_SYNC_OR_AND_FETCH_8:
- case BUILT_IN_SYNC_OR_AND_FETCH_16:
-
case BUILT_IN_SYNC_AND_AND_FETCH_1:
- case BUILT_IN_SYNC_AND_AND_FETCH_2:
- case BUILT_IN_SYNC_AND_AND_FETCH_4:
- case BUILT_IN_SYNC_AND_AND_FETCH_8:
- case BUILT_IN_SYNC_AND_AND_FETCH_16:
-
case BUILT_IN_SYNC_XOR_AND_FETCH_1:
- case BUILT_IN_SYNC_XOR_AND_FETCH_2:
- case BUILT_IN_SYNC_XOR_AND_FETCH_4:
- case BUILT_IN_SYNC_XOR_AND_FETCH_8:
- case BUILT_IN_SYNC_XOR_AND_FETCH_16:
-
case BUILT_IN_SYNC_NAND_AND_FETCH_1:
- case BUILT_IN_SYNC_NAND_AND_FETCH_2:
- case BUILT_IN_SYNC_NAND_AND_FETCH_4:
- case BUILT_IN_SYNC_NAND_AND_FETCH_8:
-
case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_1:
- case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_2:
- case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_4:
- case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_8:
- case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_16:
-
case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_1:
- case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_2:
- case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_4:
- case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_8:
- case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_16:
-
case BUILT_IN_SYNC_LOCK_TEST_AND_SET_1:
- case BUILT_IN_SYNC_LOCK_TEST_AND_SET_2:
- case BUILT_IN_SYNC_LOCK_TEST_AND_SET_4:
- case BUILT_IN_SYNC_LOCK_TEST_AND_SET_8:
- case BUILT_IN_SYNC_LOCK_TEST_AND_SET_16:
-
case BUILT_IN_SYNC_LOCK_RELEASE_1:
- case BUILT_IN_SYNC_LOCK_RELEASE_2:
- case BUILT_IN_SYNC_LOCK_RELEASE_4:
- case BUILT_IN_SYNC_LOCK_RELEASE_8:
- case BUILT_IN_SYNC_LOCK_RELEASE_16:
-
case BUILT_IN_ATOMIC_EXCHANGE_1:
- case BUILT_IN_ATOMIC_EXCHANGE_2:
- case BUILT_IN_ATOMIC_EXCHANGE_4:
- case BUILT_IN_ATOMIC_EXCHANGE_8:
- case BUILT_IN_ATOMIC_EXCHANGE_16:
-
case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_1:
- case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_2:
- case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_4:
- case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_8:
- case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_16:
-
case BUILT_IN_ATOMIC_STORE_1:
- case BUILT_IN_ATOMIC_STORE_2:
- case BUILT_IN_ATOMIC_STORE_4:
- case BUILT_IN_ATOMIC_STORE_8:
- case BUILT_IN_ATOMIC_STORE_16:
-
case BUILT_IN_ATOMIC_ADD_FETCH_1:
- case BUILT_IN_ATOMIC_ADD_FETCH_2:
- case BUILT_IN_ATOMIC_ADD_FETCH_4:
- case BUILT_IN_ATOMIC_ADD_FETCH_8:
- case BUILT_IN_ATOMIC_ADD_FETCH_16:
-
case BUILT_IN_ATOMIC_SUB_FETCH_1:
- case BUILT_IN_ATOMIC_SUB_FETCH_2:
- case BUILT_IN_ATOMIC_SUB_FETCH_4:
- case BUILT_IN_ATOMIC_SUB_FETCH_8:
- case BUILT_IN_ATOMIC_SUB_FETCH_16:
-
case BUILT_IN_ATOMIC_AND_FETCH_1:
- case BUILT_IN_ATOMIC_AND_FETCH_2:
- case BUILT_IN_ATOMIC_AND_FETCH_4:
- case BUILT_IN_ATOMIC_AND_FETCH_8:
- case BUILT_IN_ATOMIC_AND_FETCH_16:
-
case BUILT_IN_ATOMIC_NAND_FETCH_1:
- case BUILT_IN_ATOMIC_NAND_FETCH_2:
- case BUILT_IN_ATOMIC_NAND_FETCH_4:
- case BUILT_IN_ATOMIC_NAND_FETCH_8:
- case BUILT_IN_ATOMIC_NAND_FETCH_16:
-
case BUILT_IN_ATOMIC_XOR_FETCH_1:
- case BUILT_IN_ATOMIC_XOR_FETCH_2:
- case BUILT_IN_ATOMIC_XOR_FETCH_4:
- case BUILT_IN_ATOMIC_XOR_FETCH_8:
- case BUILT_IN_ATOMIC_XOR_FETCH_16:
-
case BUILT_IN_ATOMIC_OR_FETCH_1:
- case BUILT_IN_ATOMIC_OR_FETCH_2:
- case BUILT_IN_ATOMIC_OR_FETCH_4:
- case BUILT_IN_ATOMIC_OR_FETCH_8:
- case BUILT_IN_ATOMIC_OR_FETCH_16:
-
case BUILT_IN_ATOMIC_FETCH_ADD_1:
- case BUILT_IN_ATOMIC_FETCH_ADD_2:
- case BUILT_IN_ATOMIC_FETCH_ADD_4:
- case BUILT_IN_ATOMIC_FETCH_ADD_8:
- case BUILT_IN_ATOMIC_FETCH_ADD_16:
-
case BUILT_IN_ATOMIC_FETCH_SUB_1:
- case BUILT_IN_ATOMIC_FETCH_SUB_2:
- case BUILT_IN_ATOMIC_FETCH_SUB_4:
- case BUILT_IN_ATOMIC_FETCH_SUB_8:
- case BUILT_IN_ATOMIC_FETCH_SUB_16:
-
case BUILT_IN_ATOMIC_FETCH_AND_1:
- case BUILT_IN_ATOMIC_FETCH_AND_2:
- case BUILT_IN_ATOMIC_FETCH_AND_4:
- case BUILT_IN_ATOMIC_FETCH_AND_8:
- case BUILT_IN_ATOMIC_FETCH_AND_16:
-
case BUILT_IN_ATOMIC_FETCH_NAND_1:
- case BUILT_IN_ATOMIC_FETCH_NAND_2:
- case BUILT_IN_ATOMIC_FETCH_NAND_4:
- case BUILT_IN_ATOMIC_FETCH_NAND_8:
- case BUILT_IN_ATOMIC_FETCH_NAND_16:
-
case BUILT_IN_ATOMIC_FETCH_XOR_1:
- case BUILT_IN_ATOMIC_FETCH_XOR_2:
- case BUILT_IN_ATOMIC_FETCH_XOR_4:
- case BUILT_IN_ATOMIC_FETCH_XOR_8:
- case BUILT_IN_ATOMIC_FETCH_XOR_16:
-
case BUILT_IN_ATOMIC_FETCH_OR_1:
+ access_size = 1;
+ goto do_atomic;
+
+ case BUILT_IN_ATOMIC_LOAD_2:
+ is_store = false;
+ /* FALLTHRU */
+ case BUILT_IN_SYNC_FETCH_AND_ADD_2:
+ case BUILT_IN_SYNC_FETCH_AND_SUB_2:
+ case BUILT_IN_SYNC_FETCH_AND_OR_2:
+ case BUILT_IN_SYNC_FETCH_AND_AND_2:
+ case BUILT_IN_SYNC_FETCH_AND_XOR_2:
+ case BUILT_IN_SYNC_FETCH_AND_NAND_2:
+ case BUILT_IN_SYNC_ADD_AND_FETCH_2:
+ case BUILT_IN_SYNC_SUB_AND_FETCH_2:
+ case BUILT_IN_SYNC_OR_AND_FETCH_2:
+ case BUILT_IN_SYNC_AND_AND_FETCH_2:
+ case BUILT_IN_SYNC_XOR_AND_FETCH_2:
+ case BUILT_IN_SYNC_NAND_AND_FETCH_2:
+ case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_2:
+ case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_2:
+ case BUILT_IN_SYNC_LOCK_TEST_AND_SET_2:
+ case BUILT_IN_SYNC_LOCK_RELEASE_2:
+ case BUILT_IN_ATOMIC_EXCHANGE_2:
+ case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_2:
+ case BUILT_IN_ATOMIC_STORE_2:
+ case BUILT_IN_ATOMIC_ADD_FETCH_2:
+ case BUILT_IN_ATOMIC_SUB_FETCH_2:
+ case BUILT_IN_ATOMIC_AND_FETCH_2:
+ case BUILT_IN_ATOMIC_NAND_FETCH_2:
+ case BUILT_IN_ATOMIC_XOR_FETCH_2:
+ case BUILT_IN_ATOMIC_OR_FETCH_2:
+ case BUILT_IN_ATOMIC_FETCH_ADD_2:
+ case BUILT_IN_ATOMIC_FETCH_SUB_2:
+ case BUILT_IN_ATOMIC_FETCH_AND_2:
+ case BUILT_IN_ATOMIC_FETCH_NAND_2:
+ case BUILT_IN_ATOMIC_FETCH_XOR_2:
case BUILT_IN_ATOMIC_FETCH_OR_2:
+ access_size = 2;
+ goto do_atomic;
+
+ case BUILT_IN_ATOMIC_LOAD_4:
+ is_store = false;
+ /* FALLTHRU */
+ case BUILT_IN_SYNC_FETCH_AND_ADD_4:
+ case BUILT_IN_SYNC_FETCH_AND_SUB_4:
+ case BUILT_IN_SYNC_FETCH_AND_OR_4:
+ case BUILT_IN_SYNC_FETCH_AND_AND_4:
+ case BUILT_IN_SYNC_FETCH_AND_XOR_4:
+ case BUILT_IN_SYNC_FETCH_AND_NAND_4:
+ case BUILT_IN_SYNC_ADD_AND_FETCH_4:
+ case BUILT_IN_SYNC_SUB_AND_FETCH_4:
+ case BUILT_IN_SYNC_OR_AND_FETCH_4:
+ case BUILT_IN_SYNC_AND_AND_FETCH_4:
+ case BUILT_IN_SYNC_XOR_AND_FETCH_4:
+ case BUILT_IN_SYNC_NAND_AND_FETCH_4:
+ case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_4:
+ case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_4:
+ case BUILT_IN_SYNC_LOCK_TEST_AND_SET_4:
+ case BUILT_IN_SYNC_LOCK_RELEASE_4:
+ case BUILT_IN_ATOMIC_EXCHANGE_4:
+ case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_4:
+ case BUILT_IN_ATOMIC_STORE_4:
+ case BUILT_IN_ATOMIC_ADD_FETCH_4:
+ case BUILT_IN_ATOMIC_SUB_FETCH_4:
+ case BUILT_IN_ATOMIC_AND_FETCH_4:
+ case BUILT_IN_ATOMIC_NAND_FETCH_4:
+ case BUILT_IN_ATOMIC_XOR_FETCH_4:
+ case BUILT_IN_ATOMIC_OR_FETCH_4:
+ case BUILT_IN_ATOMIC_FETCH_ADD_4:
+ case BUILT_IN_ATOMIC_FETCH_SUB_4:
+ case BUILT_IN_ATOMIC_FETCH_AND_4:
+ case BUILT_IN_ATOMIC_FETCH_NAND_4:
+ case BUILT_IN_ATOMIC_FETCH_XOR_4:
case BUILT_IN_ATOMIC_FETCH_OR_4:
+ access_size = 4;
+ goto do_atomic;
+
+ case BUILT_IN_ATOMIC_LOAD_8:
+ is_store = false;
+ /* FALLTHRU */
+ case BUILT_IN_SYNC_FETCH_AND_ADD_8:
+ case BUILT_IN_SYNC_FETCH_AND_SUB_8:
+ case BUILT_IN_SYNC_FETCH_AND_OR_8:
+ case BUILT_IN_SYNC_FETCH_AND_AND_8:
+ case BUILT_IN_SYNC_FETCH_AND_XOR_8:
+ case BUILT_IN_SYNC_FETCH_AND_NAND_8:
+ case BUILT_IN_SYNC_ADD_AND_FETCH_8:
+ case BUILT_IN_SYNC_SUB_AND_FETCH_8:
+ case BUILT_IN_SYNC_OR_AND_FETCH_8:
+ case BUILT_IN_SYNC_AND_AND_FETCH_8:
+ case BUILT_IN_SYNC_XOR_AND_FETCH_8:
+ case BUILT_IN_SYNC_NAND_AND_FETCH_8:
+ case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_8:
+ case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_8:
+ case BUILT_IN_SYNC_LOCK_TEST_AND_SET_8:
+ case BUILT_IN_SYNC_LOCK_RELEASE_8:
+ case BUILT_IN_ATOMIC_EXCHANGE_8:
+ case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_8:
+ case BUILT_IN_ATOMIC_STORE_8:
+ case BUILT_IN_ATOMIC_ADD_FETCH_8:
+ case BUILT_IN_ATOMIC_SUB_FETCH_8:
+ case BUILT_IN_ATOMIC_AND_FETCH_8:
+ case BUILT_IN_ATOMIC_NAND_FETCH_8:
+ case BUILT_IN_ATOMIC_XOR_FETCH_8:
+ case BUILT_IN_ATOMIC_OR_FETCH_8:
+ case BUILT_IN_ATOMIC_FETCH_ADD_8:
+ case BUILT_IN_ATOMIC_FETCH_SUB_8:
+ case BUILT_IN_ATOMIC_FETCH_AND_8:
+ case BUILT_IN_ATOMIC_FETCH_NAND_8:
+ case BUILT_IN_ATOMIC_FETCH_XOR_8:
case BUILT_IN_ATOMIC_FETCH_OR_8:
+ access_size = 8;
+ goto do_atomic;
+
+ case BUILT_IN_ATOMIC_LOAD_16:
+ is_store = false;
+ /* FALLTHRU */
+ case BUILT_IN_SYNC_FETCH_AND_ADD_16:
+ case BUILT_IN_SYNC_FETCH_AND_SUB_16:
+ case BUILT_IN_SYNC_FETCH_AND_OR_16:
+ case BUILT_IN_SYNC_FETCH_AND_AND_16:
+ case BUILT_IN_SYNC_FETCH_AND_XOR_16:
+ case BUILT_IN_SYNC_FETCH_AND_NAND_16:
+ case BUILT_IN_SYNC_ADD_AND_FETCH_16:
+ case BUILT_IN_SYNC_SUB_AND_FETCH_16:
+ case BUILT_IN_SYNC_OR_AND_FETCH_16:
+ case BUILT_IN_SYNC_AND_AND_FETCH_16:
+ case BUILT_IN_SYNC_XOR_AND_FETCH_16:
+ case BUILT_IN_SYNC_NAND_AND_FETCH_16:
+ case BUILT_IN_SYNC_BOOL_COMPARE_AND_SWAP_16:
+ case BUILT_IN_SYNC_VAL_COMPARE_AND_SWAP_16:
+ case BUILT_IN_SYNC_LOCK_TEST_AND_SET_16:
+ case BUILT_IN_SYNC_LOCK_RELEASE_16:
+ case BUILT_IN_ATOMIC_EXCHANGE_16:
+ case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_16:
+ case BUILT_IN_ATOMIC_STORE_16:
+ case BUILT_IN_ATOMIC_ADD_FETCH_16:
+ case BUILT_IN_ATOMIC_SUB_FETCH_16:
+ case BUILT_IN_ATOMIC_AND_FETCH_16:
+ case BUILT_IN_ATOMIC_NAND_FETCH_16:
+ case BUILT_IN_ATOMIC_XOR_FETCH_16:
+ case BUILT_IN_ATOMIC_OR_FETCH_16:
+ case BUILT_IN_ATOMIC_FETCH_ADD_16:
+ case BUILT_IN_ATOMIC_FETCH_SUB_16:
+ case BUILT_IN_ATOMIC_FETCH_AND_16:
+ case BUILT_IN_ATOMIC_FETCH_NAND_16:
+ case BUILT_IN_ATOMIC_FETCH_XOR_16:
case BUILT_IN_ATOMIC_FETCH_OR_16:
+ access_size = 16;
+ /* FALLTHRU */
+ do_atomic:
{
dest = gimple_call_arg (call, 0);
/* DEST represents the address of a memory location.
instrument_derefs wants the memory location, so lets
dereference the address DEST before handing it to
instrument_derefs. */
- if (TREE_CODE (dest) == ADDR_EXPR)
- dest = TREE_OPERAND (dest, 0);
- else if (TREE_CODE (dest) == SSA_NAME || TREE_CODE (dest) == INTEGER_CST)
- dest = build2 (MEM_REF, TREE_TYPE (TREE_TYPE (dest)),
- dest, build_int_cst (TREE_TYPE (dest), 0));
- else
- gcc_unreachable ();
-
- access_size = int_size_in_bytes (TREE_TYPE (dest));
+ tree type = build_nonstandard_integer_type (access_size
+ * BITS_PER_UNIT, 1);
+ dest = build2 (MEM_REF, type, dest,
+ build_int_cst (build_pointer_type (char_type_node), 0));
+ break;
}
default:
--- gcc/testsuite/c-c++-common/asan/pr79944.c (nonexistent)
+++ gcc/testsuite/c-c++-common/asan/pr79944.c (revision 245991)
@@ -0,0 +1,18 @@
+/* PR sanitizer/79944 */
+/* { dg-do run } */
+
+struct S { int i; char p[1024]; };
+
+int
+main ()
+{
+ struct S *p = (struct S *) __builtin_malloc (__builtin_offsetof (struct S, p) + 64);
+ p->i = 5;
+ asm volatile ("" : "+r" (p) : : "memory");
+ __atomic_fetch_add ((int *) p, 5, __ATOMIC_RELAXED);
+ asm volatile ("" : "+r" (p) : : "memory");
+ if (p->i != 10)
+ __builtin_abort ();
+ __builtin_free (p);
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-10 Jakub Jelinek <jakub@redhat.com>
PR c++/79896
* decl.c (finish_enum_value_list): If value is error_mark_node,
don't copy it and change its type.
* init.c (constant_value_1): Return error_mark_node if DECL_INITIAL
of CONST_DECL is error_mark_node.
* g++.dg/ext/int128-5.C: New test.
--- gcc/cp/init.c (revision 246033)
+++ gcc/cp/init.c (revision 246034)
@@ -2162,7 +2162,8 @@ constant_value_1 (tree decl, bool strict
init = DECL_INITIAL (decl);
if (init == error_mark_node)
{
- if (DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (decl))
+ if (TREE_CODE (decl) == CONST_DECL
+ || DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (decl))
/* Treat the error as a constant to avoid cascading errors on
excessively recursive template instantiation (c++/9335). */
return init;
--- gcc/cp/decl.c (revision 246033)
+++ gcc/cp/decl.c (revision 246034)
@@ -14323,9 +14323,12 @@ finish_enum_value_list (tree enumtype)
input_location = saved_location;
/* Do not clobber shared ints. */
- value = copy_node (value);
+ if (value != error_mark_node)
+ {
+ value = copy_node (value);
- TREE_TYPE (value) = enumtype;
+ TREE_TYPE (value) = enumtype;
+ }
DECL_INITIAL (decl) = value;
}
--- gcc/testsuite/g++.dg/ext/int128-5.C (nonexistent)
+++ gcc/testsuite/g++.dg/ext/int128-5.C (revision 246034)
@@ -0,0 +1,10 @@
+// PR c++/79896
+// { dg-do compile { target { ilp32 && { ! int128 } } } }
+// { dg-options "" }
+
+enum E
+{
+ e1 = 0xffffffffffffffffULL,
+ e2, // { dg-error "overflow in enumeration values" }
+ e3
+} e = e3;
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-21 Jakub Jelinek <jakub@redhat.com>
PR c/80097
* c-typeck.c (build_binary_op): Add EXCESS_PRECISION_EXPR only around
optional COMPOUND_EXPR with ubsan instrumentation.
* gcc.dg/ubsan/pr80097.c: New test.
--- gcc/c/c-typeck.c (revision 246301)
+++ gcc/c/c-typeck.c (revision 246302)
@@ -11856,14 +11856,16 @@ build_binary_op (location_t location, en
else if (TREE_CODE (ret) != INTEGER_CST && int_operands
&& !in_late_binary_op)
ret = note_integer_operands (ret);
- if (semantic_result_type)
- ret = build1 (EXCESS_PRECISION_EXPR, semantic_result_type, ret);
protected_set_expr_location (ret, location);
if (instrument_expr != NULL)
ret = fold_build2 (COMPOUND_EXPR, TREE_TYPE (ret),
instrument_expr, ret);
+ if (semantic_result_type)
+ ret = build1_loc (location, EXCESS_PRECISION_EXPR,
+ semantic_result_type, ret);
+
return ret;
}
--- gcc/testsuite/gcc.dg/ubsan/pr80097.c (nonexistent)
+++ gcc/testsuite/gcc.dg/ubsan/pr80097.c (revision 246302)
@@ -0,0 +1,10 @@
+/* PR c/80097 */
+/* { dg-do compile } */
+/* { dg-options "-std=c89 -fsanitize=float-divide-by-zero" } */
+
+int
+foo (double a)
+{
+ int b = (1 / a >= 1);
+ return b;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-22 Jakub Jelinek <jakub@redhat.com>
PR c++/80129
* gimplify.c (gimplify_modify_expr_rhs) <case COND_EXPR>: Clear
TREE_READONLY on result if writing it more than once.
* g++.dg/torture/pr80129.C: New test.
--- gcc/gimplify.c (revision 246400)
+++ gcc/gimplify.c (revision 246401)
@@ -5098,6 +5098,14 @@ gimplify_modify_expr_rhs (tree *expr_p,
if (ret != GS_ERROR)
ret = GS_OK;
+ /* If we are going to write RESULT more than once, clear
+ TREE_READONLY flag, otherwise we might incorrectly promote
+ the variable to static const and initialize it at compile
+ time in one of the branches. */
+ if (VAR_P (result)
+ && TREE_TYPE (TREE_OPERAND (cond, 1)) != void_type_node
+ && TREE_TYPE (TREE_OPERAND (cond, 2)) != void_type_node)
+ TREE_READONLY (result) = 0;
if (TREE_TYPE (TREE_OPERAND (cond, 1)) != void_type_node)
TREE_OPERAND (cond, 1)
= build2 (code, void_type_node, result,
--- gcc/testsuite/g++.dg/torture/pr80129.C (nonexistent)
+++ gcc/testsuite/g++.dg/torture/pr80129.C (revision 246401)
@@ -0,0 +1,14 @@
+// PR c++/80129
+// { dg-do run }
+// { dg-options "-std=c++11" }
+
+struct A { bool a; int b; };
+
+int
+main ()
+{
+ bool c = false;
+ const A x = c ? A {true, 1} : A {false, 0};
+ if (x.a)
+ __builtin_abort ();
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-22 Jakub Jelinek <jakub@redhat.com>
PR c++/80141
* semantics.c (finish_omp_clause) <case OMP_CLAUSE_SIMDLEN,
case OMP_CLAUSE_ALIGNED>: Call maybe_constant_value only when not
processing_template_decl.
* g++.dg/gomp/pr80141.C: New test.
--- gcc/cp/semantics.c (revision 246402)
+++ gcc/cp/semantics.c (revision 246403)
@@ -6331,9 +6331,9 @@ finish_omp_clauses (tree clauses, bool a
else
{
t = mark_rvalue_use (t);
- t = maybe_constant_value (t);
if (!processing_template_decl)
{
+ t = maybe_constant_value (t);
if (TREE_CODE (t) != INTEGER_CST
|| tree_int_cst_sgn (t) != 1)
{
@@ -6501,9 +6501,9 @@ finish_omp_clauses (tree clauses, bool a
else
{
t = mark_rvalue_use (t);
- t = maybe_constant_value (t);
if (!processing_template_decl)
{
+ t = maybe_constant_value (t);
if (TREE_CODE (t) != INTEGER_CST
|| tree_int_cst_sgn (t) != 1)
{
--- gcc/testsuite/g++.dg/gomp/pr80141.C (nonexistent)
+++ gcc/testsuite/g++.dg/gomp/pr80141.C (revision 246403)
@@ -0,0 +1,8 @@
+// PR c++/80141
+// { dg-do compile }
+
+#pragma omp declare simd aligned (p : 2 && 2)
+template<int> void foo (int *p);
+
+#pragma omp declare simd simdlen (2 && 2)
+template<int> void bar (int *p);
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-24 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/80112
* loop-doloop.c (doloop_condition_get): Don't check condition
if cmp isn't SET with IF_THEN_ELSE src.
* gcc.dg/pr80112.c: New test.
--- gcc/loop-doloop.c (revision 246440)
+++ gcc/loop-doloop.c (revision 246441)
@@ -153,10 +153,13 @@ doloop_condition_get (rtx_insn *doloop_p
}
else
inc = PATTERN (prev_insn);
- /* We expect the condition to be of the form (reg != 0) */
- cond = XEXP (SET_SRC (cmp), 0);
- if (GET_CODE (cond) != NE || XEXP (cond, 1) != const0_rtx)
- return 0;
+ if (GET_CODE (cmp) == SET && GET_CODE (SET_SRC (cmp)) == IF_THEN_ELSE)
+ {
+ /* We expect the condition to be of the form (reg != 0) */
+ cond = XEXP (SET_SRC (cmp), 0);
+ if (GET_CODE (cond) != NE || XEXP (cond, 1) != const0_rtx)
+ return 0;
+ }
}
else
{
--- gcc/testsuite/gcc.dg/pr80112.c (nonexistent)
+++ gcc/testsuite/gcc.dg/pr80112.c (revision 246441)
@@ -0,0 +1,21 @@
+/* PR rtl-optimization/80112 */
+/* { dg-do compile } */
+/* { dg-options "-Os -fmodulo-sched" } */
+
+void **a;
+
+void
+foo (int c)
+{
+ void *d[] = {&&e, &&f};
+ a = d;
+ switch (c)
+ {
+ f:
+ c = 9;
+ /* FALLTHRU */
+ case 9:
+ goto *a++;
+ e:;
+ }
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-27 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/80168
* asan.c (instrument_derefs): Copy over last operand from
original COMPONENT_REF to the new COMPONENT_REF with
DECL_BIT_FIELD_REPRESENTATIVE.
* ubsan.c (instrument_object_size): Likewise.
* gcc.dg/asan/pr80168.c: New test.
--- gcc/asan.c (revision 246491)
+++ gcc/asan.c (revision 246492)
@@ -1868,7 +1868,8 @@ instrument_derefs (gimple_stmt_iterator
tree repr = DECL_BIT_FIELD_REPRESENTATIVE (TREE_OPERAND (t, 1));
instrument_derefs (iter, build3 (COMPONENT_REF, TREE_TYPE (repr),
TREE_OPERAND (t, 0), repr,
- NULL_TREE), location, is_store);
+ TREE_OPERAND (t, 2)),
+ location, is_store);
return;
}
--- gcc/ubsan.c (revision 246491)
+++ gcc/ubsan.c (revision 246492)
@@ -1772,7 +1772,7 @@ instrument_object_size (gimple_stmt_iter
{
tree repr = DECL_BIT_FIELD_REPRESENTATIVE (TREE_OPERAND (t, 1));
t = build3 (COMPONENT_REF, TREE_TYPE (repr), TREE_OPERAND (t, 0),
- repr, NULL_TREE);
+ repr, TREE_OPERAND (t, 2));
}
break;
case ARRAY_REF:
--- gcc/testsuite/gcc.dg/asan/pr80168.c (nonexistent)
+++ gcc/testsuite/gcc.dg/asan/pr80168.c (revision 246492)
@@ -0,0 +1,12 @@
+/* PR sanitizer/80168 */
+/* { dg-do compile } */
+
+int a;
+
+int
+foo (void)
+{
+ struct S { int c[a]; int q : 8; int e : 4; } f;
+ f.e = 4;
+ return f.e;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-30 Jakub Jelinek <jakub@redhat.com>
* env.c (initialize_env): Initialize stacksize to 0.
--- libgomp/env.c (revision 246597)
+++ libgomp/env.c (revision 246598)
@@ -1187,7 +1187,7 @@ handle_omp_display_env (unsigned long st
static void __attribute__((constructor))
initialize_env (void)
{
- unsigned long thread_limit_var, stacksize;
+ unsigned long thread_limit_var, stacksize = 0;
int wait_policy;
/* Do a compile time check that mkomp_h.pl did good job. */
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-31 Jakub Jelinek <jakub@redhat.com>
PR debug/80025
* cselib.c (cselib_hasher::equal): Pass 0 to rtx_equal_for_cselib_1.
(rtx_equal_for_cselib_1): Add depth argument. If depth
is 128, don't look up VALUE locs and punt. Increment
depth in recursive calls when walking VALUE locs.
* gcc.dg/torture/pr80025.c: New test.
--- gcc/cselib.c (revision 246605)
+++ gcc/cselib.c (revision 246606)
@@ -49,7 +49,7 @@ static void unchain_one_value (cselib_va
static void unchain_one_elt_list (struct elt_list **);
static void unchain_one_elt_loc_list (struct elt_loc_list **);
static void remove_useless_values (void);
-static int rtx_equal_for_cselib_1 (rtx, rtx, machine_mode);
+static int rtx_equal_for_cselib_1 (rtx, rtx, machine_mode, int);
static unsigned int cselib_hash_rtx (rtx, int, machine_mode);
static cselib_val *new_cselib_val (unsigned int, machine_mode, rtx);
static void add_mem_for_addr (cselib_val *, cselib_val *, rtx);
@@ -125,7 +125,7 @@ cselib_hasher::equal (const cselib_val *
/* We don't guarantee that distinct rtx's have different hash values,
so we need to do a comparison. */
for (l = v->locs; l; l = l->next)
- if (rtx_equal_for_cselib_1 (l->loc, x, memmode))
+ if (rtx_equal_for_cselib_1 (l->loc, x, memmode, 0))
{
promote_debug_loc (l);
return true;
@@ -794,7 +794,7 @@ cselib_reg_set_mode (const_rtx x)
int
rtx_equal_for_cselib_p (rtx x, rtx y)
{
- return rtx_equal_for_cselib_1 (x, y, VOIDmode);
+ return rtx_equal_for_cselib_1 (x, y, VOIDmode, 0);
}
/* If x is a PLUS or an autoinc operation, expand the operation,
@@ -844,7 +844,7 @@ autoinc_split (rtx x, rtx *off, machine_
addresses, MEMMODE should be VOIDmode. */
static int
-rtx_equal_for_cselib_1 (rtx x, rtx y, machine_mode memmode)
+rtx_equal_for_cselib_1 (rtx x, rtx y, machine_mode memmode, int depth)
{
enum rtx_code code;
const char *fmt;
@@ -877,6 +877,9 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
if (GET_CODE (y) == VALUE)
return e == canonical_cselib_val (CSELIB_VAL_PTR (y));
+ if (depth == 128)
+ return 0;
+
for (l = e->locs; l; l = l->next)
{
rtx t = l->loc;
@@ -886,7 +889,7 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
list. */
if (REG_P (t) || MEM_P (t) || GET_CODE (t) == VALUE)
continue;
- else if (rtx_equal_for_cselib_1 (t, y, memmode))
+ else if (rtx_equal_for_cselib_1 (t, y, memmode, depth + 1))
return 1;
}
@@ -897,13 +900,16 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
cselib_val *e = canonical_cselib_val (CSELIB_VAL_PTR (y));
struct elt_loc_list *l;
+ if (depth == 128)
+ return 0;
+
for (l = e->locs; l; l = l->next)
{
rtx t = l->loc;
if (REG_P (t) || MEM_P (t) || GET_CODE (t) == VALUE)
continue;
- else if (rtx_equal_for_cselib_1 (x, t, memmode))
+ else if (rtx_equal_for_cselib_1 (x, t, memmode, depth + 1))
return 1;
}
@@ -924,12 +930,12 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
if (!xoff != !yoff)
return 0;
- if (xoff && !rtx_equal_for_cselib_1 (xoff, yoff, memmode))
+ if (xoff && !rtx_equal_for_cselib_1 (xoff, yoff, memmode, depth))
return 0;
/* Don't recurse if nothing changed. */
if (x != xorig || y != yorig)
- return rtx_equal_for_cselib_1 (x, y, memmode);
+ return rtx_equal_for_cselib_1 (x, y, memmode, depth);
return 0;
}
@@ -963,7 +969,8 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
case MEM:
/* We have to compare any autoinc operations in the addresses
using this MEM's mode. */
- return rtx_equal_for_cselib_1 (XEXP (x, 0), XEXP (y, 0), GET_MODE (x));
+ return rtx_equal_for_cselib_1 (XEXP (x, 0), XEXP (y, 0), GET_MODE (x),
+ depth);
default:
break;
@@ -998,17 +1005,20 @@ rtx_equal_for_cselib_1 (rtx x, rtx y, ma
/* And the corresponding elements must match. */
for (j = 0; j < XVECLEN (x, i); j++)
if (! rtx_equal_for_cselib_1 (XVECEXP (x, i, j),
- XVECEXP (y, i, j), memmode))
+ XVECEXP (y, i, j), memmode, depth))
return 0;
break;
case 'e':
if (i == 1
&& targetm.commutative_p (x, UNKNOWN)
- && rtx_equal_for_cselib_1 (XEXP (x, 1), XEXP (y, 0), memmode)
- && rtx_equal_for_cselib_1 (XEXP (x, 0), XEXP (y, 1), memmode))
+ && rtx_equal_for_cselib_1 (XEXP (x, 1), XEXP (y, 0), memmode,
+ depth)
+ && rtx_equal_for_cselib_1 (XEXP (x, 0), XEXP (y, 1), memmode,
+ depth))
return 1;
- if (! rtx_equal_for_cselib_1 (XEXP (x, i), XEXP (y, i), memmode))
+ if (! rtx_equal_for_cselib_1 (XEXP (x, i), XEXP (y, i), memmode,
+ depth))
return 0;
break;
--- gcc/testsuite/gcc.dg/torture/pr80025.c (nonexistent)
+++ gcc/testsuite/gcc.dg/torture/pr80025.c (revision 246606)
@@ -0,0 +1,24 @@
+/* PR debug/80025 */
+/* { dg-do compile } */
+/* { dg-options "-g -ftracer -w" } */
+
+int a;
+long int b, c;
+
+long int
+foo (void)
+{
+}
+
+void
+bar (int x, short int y, unsigned short int z)
+{
+}
+
+int
+baz (void)
+{
+ a -= b;
+ b = !foo ();
+ bar (b ^= (c ^ 1) ? (c ^ 1) : foo (), (__INTPTR_TYPE__) &bar, a);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-03-31 Jakub Jelinek <jakub@redhat.com>
PR c++/79572
* c-ubsan.h (ubsan_maybe_instrument_reference): Change argument to
tree *.
* c-ubsan.c (ubsan_maybe_instrument_reference): Likewise. Handle
not just NOP_EXPR to REFERENCE_TYPE, but also INTEGER_CST with
REFERENCE_TYPE.
* cp-gimplify.c (cp_genericize_r): Sanitize INTEGER_CSTs with
REFERENCE_TYPE. Adjust ubsan_maybe_instrument_reference caller
for NOP_EXPR to REFERENCE_TYPE.
* g++.dg/ubsan/null-8.C: New test.
--- gcc/c-family/c-ubsan.c (revision 246620)
+++ gcc/c-family/c-ubsan.c (revision 246621)
@@ -458,17 +458,26 @@ ubsan_maybe_instrument_reference_or_call
return fold_build2 (COMPOUND_EXPR, TREE_TYPE (op), call, op);
}
-/* Instrument a NOP_EXPR to REFERENCE_TYPE if needed. */
+/* Instrument a NOP_EXPR to REFERENCE_TYPE or INTEGER_CST with REFERENCE_TYPE
+ type if needed. */
void
-ubsan_maybe_instrument_reference (tree stmt)
+ubsan_maybe_instrument_reference (tree *stmt_p)
{
- tree op = TREE_OPERAND (stmt, 0);
+ tree stmt = *stmt_p;
+ tree op = stmt;
+ if (TREE_CODE (stmt) == NOP_EXPR)
+ op = TREE_OPERAND (stmt, 0);
op = ubsan_maybe_instrument_reference_or_call (EXPR_LOCATION (stmt), op,
TREE_TYPE (stmt),
UBSAN_REF_BINDING);
if (op)
- TREE_OPERAND (stmt, 0) = op;
+ {
+ if (TREE_CODE (stmt) == NOP_EXPR)
+ TREE_OPERAND (stmt, 0) = op;
+ else
+ *stmt_p = op;
+ }
}
/* Instrument a CALL_EXPR to a method if needed. */
--- gcc/c-family/c-ubsan.h (revision 246620)
+++ gcc/c-family/c-ubsan.h (revision 246621)
@@ -28,7 +28,7 @@ extern tree ubsan_instrument_return (loc
extern tree ubsan_instrument_bounds (location_t, tree, tree *, bool);
extern bool ubsan_array_ref_instrumented_p (const_tree);
extern void ubsan_maybe_instrument_array_ref (tree *, bool);
-extern void ubsan_maybe_instrument_reference (tree);
+extern void ubsan_maybe_instrument_reference (tree *);
extern void ubsan_maybe_instrument_member_call (tree, bool);
/* Declare this here as well as in ubsan.h. */
--- gcc/cp/cp-gimplify.c (revision 246620)
+++ gcc/cp/cp-gimplify.c (revision 246621)
@@ -1130,6 +1130,19 @@ cp_genericize_r (tree *stmt_p, int *walk
}
}
+ if (TREE_CODE (stmt) == INTEGER_CST
+ && TREE_CODE (TREE_TYPE (stmt)) == REFERENCE_TYPE
+ && (flag_sanitize & (SANITIZE_NULL | SANITIZE_ALIGNMENT))
+ && !wtd->no_sanitize_p)
+ {
+ ubsan_maybe_instrument_reference (stmt_p);
+ if (*stmt_p != stmt)
+ {
+ *walk_subtrees = 0;
+ return NULL_TREE;
+ }
+ }
+
/* Other than invisiref parms, don't walk the same tree twice. */
if (p_set->contains (stmt))
{
@@ -1477,7 +1490,7 @@ cp_genericize_r (tree *stmt_p, int *walk
if ((flag_sanitize & (SANITIZE_NULL | SANITIZE_ALIGNMENT))
&& TREE_CODE (stmt) == NOP_EXPR
&& TREE_CODE (TREE_TYPE (stmt)) == REFERENCE_TYPE)
- ubsan_maybe_instrument_reference (stmt);
+ ubsan_maybe_instrument_reference (stmt_p);
else if (TREE_CODE (stmt) == CALL_EXPR)
{
tree fn = CALL_EXPR_FN (stmt);
--- gcc/testsuite/g++.dg/ubsan/null-8.C (nonexistent)
+++ gcc/testsuite/g++.dg/ubsan/null-8.C (revision 246621)
@@ -0,0 +1,19 @@
+// PR c++/79572
+// { dg-do run }
+// { dg-options "-fsanitize=null -std=c++14" }
+// { dg-output "reference binding to null pointer of type 'const int'" }
+
+void
+foo (const int &iref)
+{
+ if (&iref)
+ __builtin_printf ("iref %d\n", iref);
+ else
+ __builtin_printf ("iref is NULL\n");
+}
+
+int
+main ()
+{
+ foo (*((int*) __null));
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-13 Jakub Jelinek <jakub@redhat.com>
PR debug/80321
* dwarf2out.c (decls_for_scope): Ignore declarations of
current_function_decl in BLOCK_NONLOCALIZED_VARS.
* gcc.dg/debug/pr80321.c: New test.
2017-03-31 Jakub Jelinek <jakub@redhat.com>
PR debug/79255
* dwarf2out.c (decls_for_scope): If BLOCK_NONLOCALIZED_VAR is
a FUNCTION_DECL, pass it as decl instead of origin to
process_scope_var.
* gcc.dg/pr79255.c: New test.
--- gcc/dwarf2out.c (revision 246621)
+++ gcc/dwarf2out.c (revision 246900)
@@ -23156,8 +23156,18 @@ decls_for_scope (tree stmt, dw_die_ref c
for (decl = BLOCK_VARS (stmt); decl != NULL; decl = DECL_CHAIN (decl))
process_scope_var (stmt, decl, NULL_TREE, context_die);
for (i = 0; i < BLOCK_NUM_NONLOCALIZED_VARS (stmt); i++)
- process_scope_var (stmt, NULL, BLOCK_NONLOCALIZED_VAR (stmt, i),
- context_die);
+ {
+ decl = BLOCK_NONLOCALIZED_VAR (stmt, i);
+ if (decl == current_function_decl)
+ /* Ignore declarations of the current function, while they
+ are declarations, gen_subprogram_die would treat them
+ as definitions again, because they are equal to
+ current_function_decl and endlessly recurse. */;
+ else if (TREE_CODE (decl) == FUNCTION_DECL)
+ process_scope_var (stmt, decl, NULL_TREE, context_die);
+ else
+ process_scope_var (stmt, NULL_TREE, decl, context_die);
+ }
}
/* Even if we're at -g1, we need to process the subblocks in order to get
--- gcc/testsuite/gcc.dg/pr79255.c (nonexistent)
+++ gcc/testsuite/gcc.dg/pr79255.c (revision 246622)
@@ -0,0 +1,21 @@
+/* PR bootstrap/79255 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -fno-toplevel-reorder -Wno-attributes" } */
+
+static inline __attribute__((always_inline)) int foo (int x);
+
+int
+baz (void)
+{
+ return foo (3) + foo (6) + foo (9);
+}
+
+static inline __attribute__((always_inline)) int
+foo (int x)
+{
+ auto inline int __attribute__((noinline)) bar (int x)
+ {
+ return x + 3;
+ }
+ return bar (x) + bar (x + 2);
+}
--- gcc/testsuite/gcc.dg/debug/pr80321.c (nonexistent)
+++ gcc/testsuite/gcc.dg/debug/pr80321.c (revision 246900)
@@ -0,0 +1,26 @@
+/* PR debug/80321 */
+/* { dg-do compile } */
+/* { dg-options "-fkeep-inline-functions" } */
+
+void bar (void);
+
+static inline void
+test (int x)
+{
+ inline void
+ foo (int x)
+ {
+ test (0);
+ asm volatile ("" : : : "memory");
+ }
+ if (x != 0)
+ foo (x);
+ else
+ bar ();
+}
+
+void
+baz (int x)
+{
+ test (x);
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-04 Jakub Jelinek <jakub@redhat.com>
PR target/80286
* config/i386/i386.c (ix86_expand_args_builtin): If op has scalar
int mode, convert_modes it to mode as unsigned, otherwise use
lowpart_subreg to mode rather than SImode.
* config/i386/sse.md (<mask_codefor>ashr<mode>3<mask_name>,
ashr<mode>3, ashr<mode>3<mask_name>, <shift_insn><mode>3<mask_name>):
Use DImode instead of SImode for the shift count operand.
* config/i386/mmx.md (mmx_ashr<mode>3, mmx_<shift_insn><mode>3):
Likewise.
* gcc.target/i386/avx-pr80286.c: New test.
* gcc.dg/pr80286.c: New test.
--- gcc/config/i386/mmx.md (revision 246675)
+++ gcc/config/i386/mmx.md (revision 246676)
@@ -930,7 +930,7 @@ (define_insn "mmx_ashr<mode>3"
[(set (match_operand:MMXMODE24 0 "register_operand" "=y")
(ashiftrt:MMXMODE24
(match_operand:MMXMODE24 1 "register_operand" "0")
- (match_operand:SI 2 "nonmemory_operand" "yN")))]
+ (match_operand:DI 2 "nonmemory_operand" "yN")))]
"TARGET_MMX"
"psra<mmxvecsize>\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxshft")
@@ -944,7 +944,7 @@ (define_insn "mmx_<shift_insn><mode>3"
[(set (match_operand:MMXMODE248 0 "register_operand" "=y")
(any_lshift:MMXMODE248
(match_operand:MMXMODE248 1 "register_operand" "0")
- (match_operand:SI 2 "nonmemory_operand" "yN")))]
+ (match_operand:DI 2 "nonmemory_operand" "yN")))]
"TARGET_MMX"
"p<vshift><mmxvecsize>\t{%2, %0|%0, %2}"
[(set_attr "type" "mmxshft")
--- gcc/config/i386/sse.md (revision 246675)
+++ gcc/config/i386/sse.md (revision 246676)
@@ -10485,7 +10485,7 @@ (define_insn "ashr<mode>3"
[(set (match_operand:VI24_AVX2 0 "register_operand" "=x,x")
(ashiftrt:VI24_AVX2
(match_operand:VI24_AVX2 1 "register_operand" "0,x")
- (match_operand:SI 2 "nonmemory_operand" "xN,xN")))]
+ (match_operand:DI 2 "nonmemory_operand" "xN,xN")))]
"TARGET_SSE2"
"@
psra<ssemodesuffix>\t{%2, %0|%0, %2}
@@ -10504,7 +10504,7 @@ (define_insn "<mask_codefor>ashr<mode>3<
[(set (match_operand:VI24_AVX512BW_1 0 "register_operand" "=v,v")
(ashiftrt:VI24_AVX512BW_1
(match_operand:VI24_AVX512BW_1 1 "nonimmediate_operand" "v,vm")
- (match_operand:SI 2 "nonmemory_operand" "v,N")))]
+ (match_operand:DI 2 "nonmemory_operand" "v,N")))]
"TARGET_AVX512VL"
"vpsra<ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
[(set_attr "type" "sseishft")
@@ -10532,7 +10532,7 @@ (define_insn "ashr<mode>3<mask_name>"
[(set (match_operand:VI248_AVX512BW_AVX512VL 0 "register_operand" "=v,v")
(ashiftrt:VI248_AVX512BW_AVX512VL
(match_operand:VI248_AVX512BW_AVX512VL 1 "nonimmediate_operand" "v,vm")
- (match_operand:SI 2 "nonmemory_operand" "v,N")))]
+ (match_operand:DI 2 "nonmemory_operand" "v,N")))]
"TARGET_AVX512F"
"vpsra<ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
[(set_attr "type" "sseishft")
@@ -10546,7 +10546,7 @@ (define_insn "<shift_insn><mode>3<mask_n
[(set (match_operand:VI2_AVX2_AVX512BW 0 "register_operand" "=x,v")
(any_lshift:VI2_AVX2_AVX512BW
(match_operand:VI2_AVX2_AVX512BW 1 "register_operand" "0,v")
- (match_operand:SI 2 "nonmemory_operand" "xN,vN")))]
+ (match_operand:DI 2 "nonmemory_operand" "xN,vN")))]
"TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>"
"@
p<vshift><ssemodesuffix>\t{%2, %0|%0, %2}
@@ -10565,7 +10565,7 @@ (define_insn "<shift_insn><mode>3<mask_n
[(set (match_operand:VI48_AVX2 0 "register_operand" "=x,x,v")
(any_lshift:VI48_AVX2
(match_operand:VI48_AVX2 1 "register_operand" "0,x,v")
- (match_operand:SI 2 "nonmemory_operand" "xN,xN,vN")))]
+ (match_operand:DI 2 "nonmemory_operand" "xN,xN,vN")))]
"TARGET_SSE2 && <mask_mode512bit_condition>"
"@
p<vshift><ssemodesuffix>\t{%2, %0|%0, %2}
@@ -10585,7 +10585,7 @@ (define_insn "<shift_insn><mode>3<mask_n
[(set (match_operand:VI48_512 0 "register_operand" "=v,v")
(any_lshift:VI48_512
(match_operand:VI48_512 1 "nonimmediate_operand" "v,m")
- (match_operand:SI 2 "nonmemory_operand" "vN,N")))]
+ (match_operand:DI 2 "nonmemory_operand" "vN,N")))]
"TARGET_AVX512F && <mask_mode512bit_condition>"
"vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
[(set_attr "isa" "avx512f")
--- gcc/config/i386/i386.c (revision 246675)
+++ gcc/config/i386/i386.c (revision 246676)
@@ -39374,10 +39374,17 @@ ix86_expand_args_builtin (const struct b
{
/* SIMD shift insns take either an 8-bit immediate or
register as count. But builtin functions take int as
- count. If count doesn't match, we put it in register. */
+ count. If count doesn't match, we put it in register.
+ The instructions are using 64-bit count, if op is just
+ 32-bit, zero-extend it, as negative shift counts
+ are undefined behavior and zero-extension is more
+ efficient. */
if (!match)
{
- op = simplify_gen_subreg (SImode, op, GET_MODE (op), 0);
+ if (SCALAR_INT_MODE_P (GET_MODE (op)))
+ op = convert_modes (mode, GET_MODE (op), op, 1);
+ else
+ op = simplify_gen_subreg (mode, op, GET_MODE (op), 0);
if (!insn_p->operand[i + 1].predicate (op, mode))
op = copy_to_reg (op);
}
--- gcc/testsuite/gcc.target/i386/avx-pr80286.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/avx-pr80286.c (revision 246676)
@@ -0,0 +1,26 @@
+/* PR target/80286 */
+/* { dg-do run { target avx } } */
+/* { dg-options "-O2 -mavx" } */
+
+#include "avx-check.h"
+#include <immintrin.h>
+
+__m256i m;
+
+__attribute__((noinline, noclone)) __m128i
+foo (__m128i x)
+{
+ int s = _mm_cvtsi128_si32 (_mm256_castsi256_si128 (m));
+ return _mm_srli_epi16 (x, s);
+}
+
+static void
+avx_test (void)
+{
+ __m128i a = (__m128i) (__v8hi) { 1 << 7, 2 << 8, 3 << 9, 4 << 10, 5 << 11, 6 << 12, 7 << 13, 8 << 12 };
+ m = (__m256i) (__v8si) { 7, 8, 9, 10, 11, 12, 13, 14 };
+ __m128i c = foo (a);
+ __m128i b = (__m128i) (__v8hi) { 1, 2 << 1, 3 << 2, 4 << 3, 5 << 4, 6 << 5, 7 << 6, 8 << 5 };
+ if (__builtin_memcmp (&c, &b, sizeof (__m128i)))
+ __builtin_abort ();
+}
--- gcc/testsuite/gcc.dg/pr80286.c (nonexistent)
+++ gcc/testsuite/gcc.dg/pr80286.c (revision 246676)
@@ -0,0 +1,23 @@
+/* PR target/80286 */
+/* { dg-do run } */
+/* { dg-options "-O2 -Wno-psabi" } */
+
+typedef int V __attribute__((vector_size (4 * sizeof (int))));
+
+__attribute__((noinline, noclone)) V
+foo (V x, V y)
+{
+ return x << y[0];
+}
+
+int
+main ()
+{
+ V x = { 1, 2, 3, 4 };
+ V y = { 5, 6, 7, 8 };
+ V z = foo (x, y);
+ V e = { 1 << 5, 2 << 5, 3 << 5, 4 << 5 };
+ if (__builtin_memcmp (&z, &e, sizeof (V)))
+ __builtin_abort ();
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-04 Jakub Jelinek <jakub@redhat.com>
Richard Biener <rguenther@suse.de>
PR c++/80297
* genmatch.c (capture::gen_transform): For GENERIC unshare_expr
captures used multiple times, except for the last use.
* generic-match-head.c: Include gimplify.h.
* g++.dg/torture/pr80297.C: New test.
--- gcc/generic-match-head.c (revision 246692)
+++ gcc/generic-match-head.c (revision 246693)
@@ -33,6 +33,7 @@ along with GCC; see the file COPYING3.
#include "builtins.h"
#include "dumpfile.h"
#include "case-cfn-macros.h"
+#include "gimplify.h"
/* Routine to determine if the types T1 and T2 are effectively
--- gcc/genmatch.c (revision 246692)
+++ gcc/genmatch.c (revision 246693)
@@ -2525,7 +2525,18 @@ capture::gen_transform (FILE *f, int ind
}
}
- fprintf_indent (f, indent, "%s = captures[%u];\n", dest, where);
+ /* If in GENERIC some capture is used multiple times, unshare it except
+ when emitting the last use. */
+ if (!gimple
+ && cinfo->info.exists ()
+ && cinfo->info[cinfo->info[where].same_as].result_use_count > 1)
+ {
+ fprintf_indent (f, indent, "%s = unshare_expr (captures[%u]);\n",
+ dest, where);
+ cinfo->info[cinfo->info[where].same_as].result_use_count--;
+ }
+ else
+ fprintf_indent (f, indent, "%s = captures[%u];\n", dest, where);
/* ??? Stupid tcc_comparison GENERIC trees in COND_EXPRs. Deal
with substituting a capture of that. */
--- gcc/testsuite/g++.dg/torture/pr80297.C (nonexistent)
+++ gcc/testsuite/g++.dg/torture/pr80297.C (revision 246693)
@@ -0,0 +1,12 @@
+// PR c++/80297
+// { dg-do compile }
+
+extern const unsigned long int b;
+extern const long long int c;
+
+int
+foo ()
+{
+ int a = 809 >> -(b & !c) + b - (long long)(b & !c);
+ return a;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-10 Jakub Jelinek <jakub@redhat.com>
PR c++/80176
* tree.c (lvalue_kind): For COMPONENT_REF with BASELINK second
operand, if it is a static member function, recurse on the
BASELINK.
* g++.dg/init/ref23.C: New test.
--- gcc/cp/tree.c (revision 246824)
+++ gcc/cp/tree.c (revision 246825)
@@ -105,6 +105,17 @@ lvalue_kind (const_tree ref)
return op1_lvalue_kind;
case COMPONENT_REF:
+ if (BASELINK_P (TREE_OPERAND (ref, 1)))
+ {
+ tree fn = BASELINK_FUNCTIONS (TREE_OPERAND (ref, 1));
+
+ /* For static member function recurse on the BASELINK, we can get
+ here e.g. from reference_binding. If BASELINK_FUNCTIONS is
+ OVERLOAD, the overload is resolved first if possible through
+ resolve_address_of_overloaded_function. */
+ if (TREE_CODE (fn) == FUNCTION_DECL && DECL_STATIC_FUNCTION_P (fn))
+ return lvalue_kind (TREE_OPERAND (ref, 1));
+ }
op1_lvalue_kind = lvalue_kind (TREE_OPERAND (ref, 0));
/* Look at the member designator. */
if (!op1_lvalue_kind)
--- gcc/testsuite/g++.dg/init/ref23.C (nonexistent)
+++ gcc/testsuite/g++.dg/init/ref23.C (revision 246825)
@@ -0,0 +1,15 @@
+// PR c++/80176
+// { dg-do compile }
+
+struct X { static void foo(); static void baz(int); static int baz(double); } x;
+struct Y { void o(unsigned char); static void o(int); void o(double); } y;
+void X::foo() {}
+static void bar() {}
+void (&r1)() = x.foo;
+void (&r2)() = X::foo;
+void (&r3)() = bar;
+void (&r4)(int) = x.baz;
+int (&r5)(double) = x.baz;
+void (&r6)(int) = X::baz;
+int (&r7)(double) = X::baz;
+void (&r8)(int) = y.o;
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-11 Jakub Jelinek <jakub@redhat.com>
PR c++/80363
* error.c (dump_expr): Handle VEC_COND_EXPR like COND_EXPR.
* g++.dg/ext/pr80363.C: New test.
--- gcc/cp/error.c (revision 246833)
+++ gcc/cp/error.c (revision 246834)
@@ -2080,6 +2080,7 @@ dump_expr (cxx_pretty_printer *pp, tree
break;
case COND_EXPR:
+ case VEC_COND_EXPR:
pp_cxx_left_paren (pp);
dump_expr (pp, TREE_OPERAND (t, 0), flags | TFF_EXPR_IN_PARENS);
pp_string (pp, " ? ");
--- gcc/testsuite/g++.dg/ext/pr80363.C (nonexistent)
+++ gcc/testsuite/g++.dg/ext/pr80363.C (revision 246834)
@@ -0,0 +1,12 @@
+// PR c++/80363
+// { dg-do compile }
+
+typedef int V __attribute__((vector_size (16)));
+
+int
+foo (V *a, V *b)
+{
+ if (*a < *b) // { dg-error "could not convert\[^#]*from" }
+ return 1;
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-11 Jakub Jelinek <jakub@redhat.com>
PR libgomp/80394
* omp-low.c (scan_omp_task): Don't optimize away empty tasks
if they have any depend clauses.
* testsuite/libgomp.c/pr80394.c: New test.
--- gcc/omp-low.c (revision 246848)
+++ gcc/omp-low.c (revision 246849)
@@ -2711,9 +2711,11 @@ scan_omp_task (gimple_stmt_iterator *gsi
tree name, t;
gomp_task *stmt = as_a <gomp_task *> (gsi_stmt (*gsi));
- /* Ignore task directives with empty bodies. */
+ /* Ignore task directives with empty bodies, unless they have depend
+ clause. */
if (optimize > 0
- && empty_body_p (gimple_omp_body (stmt)))
+ && empty_body_p (gimple_omp_body (stmt))
+ && !find_omp_clause (gimple_omp_task_clauses (stmt), OMP_CLAUSE_DEPEND))
{
gsi_replace (gsi, gimple_build_nop (), false);
return;
--- libgomp/testsuite/libgomp.c/pr80394.c (nonexistent)
+++ libgomp/testsuite/libgomp.c/pr80394.c (revision 246849)
@@ -0,0 +1,22 @@
+/* PR libgomp/80394 */
+
+int
+main ()
+{
+ int x = 0;
+ #pragma omp parallel shared(x)
+ #pragma omp single
+ {
+ #pragma omp task depend(inout: x)
+ {
+ for (int i = 0; i < 100000; i++)
+ asm volatile ("" : : : "memory");
+ x += 5;
+ }
+ #pragma omp task if (0) depend(inout: x)
+ ;
+ if (x != 5)
+ __builtin_abort ();
+ }
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-11 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/80385
* simplify-rtx.c (simplify_unary_operation_1): Don't transform
(not (neg X)) into (plus X -1) for complex or non-integral modes.
* g++.dg/opt/pr80385.C: New test.
--- gcc/simplify-rtx.c (revision 246849)
+++ gcc/simplify-rtx.c (revision 246850)
@@ -932,8 +932,10 @@ simplify_unary_operation_1 (enum rtx_cod
&& XEXP (op, 1) == constm1_rtx)
return simplify_gen_unary (NEG, mode, XEXP (op, 0), mode);
- /* Similarly, (not (neg X)) is (plus X -1). */
- if (GET_CODE (op) == NEG)
+ /* Similarly, (not (neg X)) is (plus X -1). Only do this for
+ modes that have CONSTM1_RTX, i.e. MODE_INT, MODE_PARTIAL_INT
+ and MODE_VECTOR_INT. */
+ if (GET_CODE (op) == NEG && CONSTM1_RTX (mode))
return simplify_gen_binary (PLUS, mode, XEXP (op, 0),
CONSTM1_RTX (mode));
--- gcc/testsuite/g++.dg/opt/pr80385.C (nonexistent)
+++ gcc/testsuite/g++.dg/opt/pr80385.C (revision 246850)
@@ -0,0 +1,14 @@
+// PR rtl-optimization/80385
+// { dg-do compile { target { i?86-*-* x86_64-*-* } } }
+// { dg-options "-Ofast -msse2" }
+
+#include <x86intrin.h>
+
+__m128 a, e;
+struct A { __m128 b; A (); A (__m128 x) : b(x) {} };
+A operator+ (A, A);
+A operator- (A) { __m128 c = -a; return c; }
+A foo (A x) { __m128 d = x.b; return _mm_andnot_ps (d, e); }
+struct B { A n[1]; };
+void bar (B x) { A f = foo (x.n[0]); A g = f + A (); }
+void baz () { B h; B i; A j; i.n[0] = -j; h = i; B k = h; bar (k); }
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-12 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/80349
* fold-const.c (fold_binary_loc) <case BIT_IOR_EXPR>: Convert arg0's
first argument to type.
* g++.dg/ubsan/pr80349.C: New test.
--- gcc/fold-const.c (revision 246864)
+++ gcc/fold-const.c (revision 246865)
@@ -9916,12 +9916,12 @@ fold_binary_loc (location_t loc,
}
if (c3 != c1)
- return fold_build2_loc (loc, BIT_IOR_EXPR, type,
- fold_build2_loc (loc, BIT_AND_EXPR, type,
- TREE_OPERAND (arg0, 0),
- wide_int_to_tree (type,
- c3)),
- arg1);
+ {
+ tem = fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));
+ tem = fold_build2_loc (loc, BIT_AND_EXPR, type, tem,
+ wide_int_to_tree (type, c3));
+ return fold_build2_loc (loc, BIT_IOR_EXPR, type, tem, arg1);
+ }
}
/* See if this can be simplified into a rotate first. If that
--- gcc/testsuite/g++.dg/ubsan/pr80349.C (nonexistent)
+++ gcc/testsuite/g++.dg/ubsan/pr80349.C (revision 246865)
@@ -0,0 +1,11 @@
+// PR sanitizer/80349
+// { dg-do compile }
+// { dg-options "-fsanitize=undefined" }
+
+extern const long long int v;
+
+void
+foo ()
+{
+ (int)((v & 50 | 051UL) << 0) << 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-25 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/80501
* combine.c (make_compound_operation_int): Set subreg_code to SET
even for AND with mask of the sign bit of mode.
* gcc.c-torture/execute/pr80501.c: New test.
--- gcc/combine.c (revision 247127)
+++ gcc/combine.c (revision 247128)
@@ -8170,12 +8170,15 @@ make_compound_operation_int (machine_mod
|| GET_CODE (inner) == SUBREG
/* (subreg:SI (and:DI (reg:DI) (const_int 0x800000000)) 0)
is (const_int 0), rather than
- (subreg:SI (lshiftrt:DI (reg:DI) (const_int 35)) 0). */
+ (subreg:SI (lshiftrt:DI (reg:DI) (const_int 35)) 0).
+ Similarly (subreg:QI (and:SI (reg:SI) (const_int 0x80)) 0)
+ for non-equality comparisons against 0 is not equivalent
+ to (subreg:QI (lshiftrt:SI (reg:SI) (const_int 7)) 0). */
|| (GET_CODE (inner) == AND
&& CONST_INT_P (XEXP (inner, 1))
&& GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (inner))
&& exact_log2 (UINTVAL (XEXP (inner, 1)))
- >= GET_MODE_BITSIZE (mode))))
+ >= GET_MODE_BITSIZE (mode) - 1)))
subreg_code = SET;
tem = make_compound_operation (inner, subreg_code);
--- gcc/testsuite/gcc.c-torture/execute/pr80501.c (nonexistent)
+++ gcc/testsuite/gcc.c-torture/execute/pr80501.c (revision 247128)
@@ -0,0 +1,23 @@
+/* PR rtl-optimization/80501 */
+
+signed char v = 0;
+
+static signed char
+foo (int x, int y)
+{
+ return x << y;
+}
+
+__attribute__((noinline, noclone)) int
+bar (void)
+{
+ return foo (v >= 0, __CHAR_BIT__ - 1) >= 1;
+}
+
+int
+main ()
+{
+ if (sizeof (int) > sizeof (char) && bar () != 0)
+ __builtin_abort ();
+ return 0;
+}
-------------- next part --------------
2017-05-05 Jakub Jelinek <jakub@redhat.com>
Backported from mainline
2017-04-25 Jakub Jelinek <jakub@redhat.com>
* Makefile.in (s-options): Invoke opt-gather.awk with LC_ALL=C in the
environment.
--- gcc/Makefile.in (revision 247265)
+++ gcc/Makefile.in (revision 247266)
@@ -2139,6 +2139,7 @@ s-specs : Makefile
optionlist: s-options ; @true
s-options: $(ALL_OPT_FILES) Makefile $(srcdir)/opt-gather.awk
+ LC_ALL=C ; export LC_ALL ; \
$(AWK) -f $(srcdir)/opt-gather.awk $(ALL_OPT_FILES) > tmp-optionlist
$(SHELL) $(srcdir)/../move-if-change tmp-optionlist optionlist
$(STAMP) s-options
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