[PATCH,rs6000] PR80103: Fix ICE with cross compiler

Kelvin Nilsen kdnilsen@linux.vnet.ibm.com
Fri Mar 24 22:10:00 GMT 2017


PR 80103 provides a test case which results in an internal
compiler error when invoked with -mno-direct-move -mpower9-dform-
vector target options.  The internal compiler error results because
these two target options are incompatible with each other.

The enclosed patch simply disables this particular combination of
target options, terminating gcc with an error message instead of
producing an internal compiler error.  Additionally, this patch
includes new comments to address omissions from a patch committed
on 2017/03/23 which deals with conflicts between the 
-mno-power9-vector and -mcpu=power9 target options.

This patch has been bootstrapped and tested with no regressions on
both powerpc64-unknown-linux-gnu and powerpc64le-unknown-linux-gnu.
Is this ok for the trunk?

gcc/testsuite/ChangeLog:

2017-03-24  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/80103
	* gcc.target/powerpc/pr80103-1.c: New test.


gcc/ChangeLog:

2017-03-24  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/80103
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Edit and
	add comments.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
	special handling for target option conflicts between dform
	options (-mpower9-dform, -mpower9-dform-vector,
	-mpower9-dform-scalar) and -mno-direct-move.

Index: gcc/config/rs6000/rs6000-c.c
===================================================================
--- gcc/config/rs6000/rs6000-c.c	(revision 246406)
+++ gcc/config/rs6000/rs6000-c.c	(working copy)
@@ -429,6 +429,12 @@ rs6000_target_modify_macros (bool define_p, HOST_W
   if ((flags & OPTION_MASK_POPCNTD) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
   /* Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
+     turned on in the following condition:
+     1. TARGET_P9_DFORM_SCALAR or TARGET_P9_DFORM_VECTOR are enabled
+        and OPTION_MASK_DIRECT_MOVE is not explicitly disabled.
+        Hereafter, the OPTION_MASK_DIRECT_MOVE flag is considered to
+        have been turned on explicitly.
+     Note that the OPTION_MASK_DIRECT_MOVE flag is automatically
      turned off in any of the following conditions:
      1. TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX is explicitly
 	disabled and OPTION_MASK_DIRECT_MOVE was not explicitly
@@ -473,8 +479,13 @@ rs6000_target_modify_macros (bool define_p, HOST_W
       if (!flag_iso)
 	rs6000_define_or_undefine_macro (define_p, "__APPLE_ALTIVEC__");
     }
-  /* Note that the OPTION_MASK_VSX flag is automatically turned off in
+  /* Note that the OPTION_MASK_VSX flag is automatically turned on in
      the following conditions:
+     1. TARGET_P8_VECTOR is explicitly turned on and the OPTION_MASK_VSX
+        was not explicitly turned off.  Hereafter, the OPTION_MASK_VSX
+        flag is considered to have been explicitly turned on.
+     Note that the OPTION_MASK_VSX flag is automatically turned off in
+     the following conditions:
      1. The operating system does not support saving of AltiVec
 	registers (OS_MISSING_ALTIVEC).
      2. If any of the options TARGET_HARD_FLOAT, TARGET_FPRS,
@@ -507,6 +518,12 @@ rs6000_target_modify_macros (bool define_p, HOST_W
       rs6000_define_or_undefine_macro (define_p, "__TM_FENCE__");
     }
   /* Note that the OPTION_MASK_P8_VECTOR flag is automatically turned
+     on in the following conditions:
+     1. TARGET_P9_VECTOR is explicitly turned on and
+        OPTION_MASK_P8_VECTOR is not explicitly turned off.
+        Hereafter, the OPTION_MASK_P8_VECTOR flag is considered to
+        have been turned off explicitly.
+     Note that the OPTION_MASK_P8_VECTOR flag is automatically turned
      off in the following conditions:
      1. If any of TARGET_HARD_FLOAT, TARGET_ALTIVEC, or TARGET_VSX
 	were turned off explicitly and OPTION_MASK_P8_VECTOR flag was
@@ -514,15 +531,24 @@ rs6000_target_modify_macros (bool define_p, HOST_W
      2. If TARGET_ALTIVEC is turned off.  Hereafter, the
 	OPTION_MASK_P8_VECTOR flag is considered to have been turned off
 	explicitly.
-     3. If TARGET_VSX is turned off.  Hereafter, the OPTION_MASK_P8_VECTOR
-	flag is considered to have been turned off explicitly.  */
+     3. If TARGET_VSX is turned off and OPTION_MASK_P8_VECTOR was not
+        explicitly enabled.  If TARGET_VSX is explicitly enabled, the
+        OPTION_MASK_P8_VECTOR flag is hereafter also considered to
+	have been turned off explicitly.  */
   if ((flags & OPTION_MASK_P8_VECTOR) != 0)
     rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__");
   /* Note that the OPTION_MASK_P9_VECTOR flag is automatically turned
      off in the following conditions:
-     1. If TARGET_P8_VECTOR is turned off. Hereafter, the
-	OPTION_MASK_P9_VECTOR flag is considered to have been turned off
-	explicitly.  */
+     1. If TARGET_P8_VECTOR is turned off and OPTION_MASK_P9_VECTOR is
+        not turned on explicitly. Hereafter, if OPTION_MASK_P8_VECTOR
+        was turned on explicitly, the OPTION_MASK_P9_VECTOR flag is
+        also considered to have been turned off explicitly.
+     Note that the OPTION_MASK_P9_VECTOR is automatically turned on
+     in the following conditions:
+     1. If TARGET_P9_DFORM_SCALAR or TARGET_P9_DFORM_VECTOR and
+        OPTION_MASK_P9_VECTOR was not turned off explicitly.
+        Hereafter, THE OPTION_MASK_P9_VECTOR flag is considered to
+        have been turned on explicitly.  */
   if ((flags & OPTION_MASK_P9_VECTOR) != 0)
     rs6000_define_or_undefine_macro (define_p, "__POWER9_VECTOR__");
   /* Note that the OPTION_MASK_QUAD_MEMORY flag is automatically
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 246406)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -4549,6 +4549,33 @@ rs6000_option_override_internal (bool global_init_
 			    | OPTION_MASK_P9_DFORM_VECTOR);
     }
 
+  if ((TARGET_P9_DFORM_SCALAR || TARGET_P9_DFORM_VECTOR)
+      && !TARGET_DIRECT_MOVE)
+    {
+      /* We prefer to not mention undocumented options in
+	 error messages.  However, if users have managed to select
+	 power9-dform without selecting power9-vector, they
+	 already know about undocumented flags.  */
+      if ((rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE)
+	  && ((rs6000_isa_flags_explicit & OPTION_MASK_P9_DFORM_VECTOR) ||
+	      (rs6000_isa_flags_explicit & OPTION_MASK_P9_DFORM_SCALAR) ||
+	      (TARGET_P9_DFORM_BOTH == 1)))
+	error ("-mpower9-dform, -mpower9-dform-vector, -mpower9-dform-scalar"
+	       " require -mdirect-move");
+      else if ((rs6000_isa_flags_explicit & OPTION_MASK_DIRECT_MOVE) == 0)
+	{
+	  rs6000_isa_flags |= OPTION_MASK_DIRECT_MOVE;
+	  rs6000_isa_flags_explicit |= OPTION_MASK_DIRECT_MOVE;
+	}
+      else
+	{
+	  rs6000_isa_flags &=
+	    ~(OPTION_MASK_P9_DFORM_SCALAR | OPTION_MASK_P9_DFORM_VECTOR);
+	  rs6000_isa_flags_explicit |=
+	    (OPTION_MASK_P9_DFORM_SCALAR | OPTION_MASK_P9_DFORM_VECTOR);
+	}
+    }
+
   if (TARGET_P9_DFORM_SCALAR && !TARGET_UPPER_REGS_DF)
     {
       /* We prefer to not mention undocumented options in
Index: gcc/testsuite/gcc.target/powerpc/pr80103-1.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr80103-1.c	(revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr80103-1.c	(working copy)
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mpower9-dform-vector -mno-direct-move" } */
+/* { dg-excess-errors "expect error due to conflicting target options" } */
+/* Since the error message is not associated with a particular line
+   number, we cannot use the dg-error directive and cannot specify a
+   regexp to describe the expected error message.  The expected error
+   message is: "-mpower9-dform, -mpower9-dform-vector,
+                -mpower9-dform-scalar require -mdirect-move" */
+
+int a;
+void b (__attribute__ ((__vector_size__ (16))) char c)
+{
+  a = ((__attributes__ ((__vector_size__ (2 * sizeof (long)))) long) c)[0];
+}



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