[PATCH, GCC/ARM, stage4] Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R

Thomas Preudhomme thomas.preudhomme@foss.arm.com
Wed Mar 22 10:25:00 GMT 2017


Hi,

Currently GCC is happy to use LDRD to perform a 64bit load on ARMv7-R,
as shown by the testcase on this patch. However, LDRD is only atomic
when LPAE extensions is available, which they are not for ARMv7-R. This
commit solve the issue by introducing a new feature bit to distinguish
LPAE extensions instead of deducing it from div instruction
availability.

ChangeLog entries are as follow:

*** gcc/ChangeLog ***

	PR target/80082
	* config/arm/arm-isa.h (isa_bit_lpae): New feature bit.
	(ISA_ARMv7ve): Add isa_bit_lpae to the definition.
	* config/arm/arm-protos.h (arm_arch7ve): Rename into ...
	(arm_arch_lpae): This.
	* config/arm/arm.c (arm_arch7ve): Rename into ...
	(arm_arch_lpae): This.  Define it in term of isa_bit_lpae.
	* config/arm/arm.h (TARGET_HAVE_LPAE): Redefine in term of
	arm_arch_lpae.

*** gcc/testsuite/ChangeLog ***

	PR target/80082
	* gcc.target/arm/atomic_loaddi_10.c: New testcase.
	* gcc.target/arm/atomic_loaddi_11.c: Likewise.


Boostrapped for -march=armv7ve and no testsuite regression.

Is this ok for stage4?

Best regards,

Thomas
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