[Patch AArch64] Stop generating BSL for simple integer code

[James Greenhalgh]

Hi,

In this testcase, all argument registers and the return register
will be general purpose registers:

  long long
  foo (long long a, long long b, long long c)
  {
    return ((a ^ b) & c) ^ b;
  }

However, due to the implementation of aarch64_simd_bsl<mode>_internal
we'll match that pattern and emit a BSL, necessitating moving all those
arguments and results to the Advanced SIMD registers:

	fmov	d2, x0
	fmov	d0, x2
	fmov	d1, x1
	bsl	v0.8b, v2.8b, v1.8b
	fmov	x0, d0

To fix this, we turn aarch64_simd_bsldi_internal in to an insn_and_split that
knows to split back to integer operations if the register allocation
falls that way.

We could have used an unspec, but then we lose some of the nice
simplifications that can be made from explicitly spelling out the semantics
of BSL.

Bootstrapped on aarch64-none-linux-gnu.

OK?

Thanks,
James

---
gcc/

2017-06-12  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_simd_bsl<mode>_internal): Remove DImode.
	(*aarch64_simd_bsl<mode>_alt): Likewise.
	(aarch64_simd_bsldi_internal): New.

gcc/testsuite/

2017-06-12  James Greenhalgh  <james.greenhalgh@arm.com>

	* gcc.target/aarch64/no-dimode-bsl.c: New.
	* gcc.target/aarch64/dimode-bsl.c: New.

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