[PATCH][GCC][Aarch64] Add vectorize patten for copysign.

[Tamar Christina]

Hi All,

This is a slight modification of the earlier patch (Using a different constant in the mask creation.)

< +                                                  HOST_WIDE_INT_M1 << bits));
---
> +                                                  HOST_WIDE_INT_M1U << bits));

Kind Regards,
Tamar

________________________________________
From: gcc-patches-owner@gcc.gnu.org <gcc-patches-owner@gcc.gnu.org> on behalf of Tamar Christina <Tamar.Christina@arm.com>
Sent: Tuesday, January 17, 2017 2:50:19 PM
To: GCC Patches; James Greenhalgh; Marcus Shawcroft; Richard Earnshaw
Cc: nd
Subject: [PATCH][GCC][Aarch64] Add vectorize patten for copysign.

Hi All,

This patch vectorizes the copysign builtin for AArch64
similar to how it is done for Arm.

AArch64 now generates:

...
.L4:
        ldr     q1, [x6, x3]
        add     w4, w4, 1
        ldr     q0, [x5, x3]
        cmp     w4, w7
        bif     v1.16b, v2.16b, v3.16b
        fmul    v0.2d, v0.2d, v1.2d
        str     q0, [x5, x3]

for the input:

     x * copysign(1.0, y)

On 481.wrf in Spec2006 on AArch64 this gives us a speedup of 9.1%.
Regtested on  aarch64-none-linux-gnu and no regressions.

Ok for trunk?

gcc/
2017-01-17  Tamar Christina  <tamar.christina@arm.com>

        * config/aarch64/aarch64-builtins.c
        (aarch64_builtin_vectorized_function): Added CASE_CFN_COPYSIGN.
        * config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
        Changed int to HOST_WIDE_INT.
        * config/aarch64/aarch64-protos.h
        (aarch64_simd_gen_const_vector_dup): Likewise.
        * config/aarch64/aarch64-simd-builtins.def: Added copysign BINOP.
        * config/aarch64/aarch64-simd.md: Added copysign<mode>3.

gcc/testsuite/
2017-01-17  Tamar Christina  <tamar.christina@arm.com>

        * gcc.target/arm/vect-copysignf.c: Move to...
        * gcc.dg/vect/vect-copysignf.c: ... Here.
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