[PATCH, MIPS] Target flag and build option to disable indexed memory OPs.

[Doug Gilmore]

On 01/17/2017 05:41 AM, Moore, Catherine wrote:
> 
>
>> ...
>> Having thought further I agree we can safely ignore DSP indexed load
>> and micromips LWXS on
>> the basis that DSP code will not run on a MIPS64 processor anyway (at
>> least none that I
>> know of) so the issue cannot occur and similarly for microMIPS, there
>> are no 64-bit cores.
>>
>> Restricting to just LWXC1/SWXC1/LDXC1/SDXC1 is therefore fine but
>> we should reflect
>> that in option names then.
>>
>> --with-lxc1-sxc1 --without-lxc1-sxc1
>> -mlxc1-sxc1
>>
>> These names reflect the internal macro that controls availability of
>> these instructions.
>>
>> Macro name: __mips_no_lxc1_sxc1
>> Defined when !ISA_HAS_LXC1_SXC1 so would be present even when
>> targeting a core that
>> doesn't have the instructions anyway.
>>
>> Any refinements to this Catherine?
>>
> No.  This plan looks good.
> 
Sounds good, I'll update the patch accordingly.

BTW, if we did guard all of the indexed memory OPs with a flag
there would be ~150 tests to clean up when configuring with indexed
memory OPs disabled.  When I tested with indexed memory OPs disabled
with the original patch, there were no additional regressions.

Also I'll be updating the bug report with my current take on what went
wrong with r216501.

Thanks,

Doug