[PATCH] Fix ICE with selective scheduling and VTA (PR target/79570)

[Jakub Jelinek]

Hi!

We ICE in the following hunk which has been added by Alexandre back
in VTA merge.  A fairly recent change started clearing BLOCK_FOR_INSN
for instructions that are temporarily removed from the IL (but those
would never previously satisfy the condition - they would never be
heads of their block).  While it isn't well understood why the condition
is in there, the patch pretty much restores the previous behavior for
such DEBUG_INSNs.  Bootstrapped/regtested on x86_64-linux and i686-linux,
ok for trunk?

2017-02-21  Jakub Jelinek  <jakub@redhat.com>

	PR target/79570
	* sel-sched.c (moveup_expr_cached): Don't call sel_bb_head
	on temporarily removed DEBUG_INSNs.

	* gcc.dg/pr79570.c: New test.

--- gcc/sel-sched.c.jj	2017-01-01 12:45:38.000000000 +0100
+++ gcc/sel-sched.c	2017-02-17 14:14:06.493525368 +0100
@@ -2529,6 +2529,7 @@ moveup_expr_cached (expr_t expr, insn_t
     }
 
   if (DEBUG_INSN_P (EXPR_INSN_RTX (expr))
+      && BLOCK_FOR_INSN (EXPR_INSN_RTX (expr))
       && (sel_bb_head (BLOCK_FOR_INSN (EXPR_INSN_RTX (expr)))
 	  == EXPR_INSN_RTX (expr)))
     /* Don't use cached information for debug insns that are heads of
--- gcc/testsuite/gcc.dg/pr79570.c.jj	2017-02-17 14:37:15.183672738 +0100
+++ gcc/testsuite/gcc.dg/pr79570.c	2017-02-17 14:37:10.306738336 +0100
@@ -0,0 +1,6 @@
+/* PR target/79570 */
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -fselective-scheduling2 -fvar-tracking-assignments" } */
+/* { dg-warning "changes selective scheduling" "" { target *-*-* } 0 } */
+
+#include "pr69956.c"

	Jakub