[patch,avr] Tweak addhi3_zero_extend.

[Georg-Johann Lay]

This patch adds an alternative to addhi3_zero_extend for the case
where output operand and the 8-bit addend happen to reside
the the same register.  Without the patch this might lead
to additional reloads to satisfy the constraints like


uint16_t func (uint8_t x, uint16_t y)
{
     return x + y;
}


Without the new alternative the code will be


func:
	movw r18,r22	 ;  18	*movhi/1	[length = 1]
	add r18,r24	 ;  13	*addhi3_zero_extend	[length = 2]
	adc r19,__zero_reg__
	movw r24,r18	 ;  19	*movhi/1	[length = 1]
/* epilogue start */
	ret


With the change the code reads


func:
	add r24,r22	 ;  13	*addhi3_zero_extend/2	[length = 3]
	mov r25,r23
	adc r25,__zero_reg__
/* epilogue start */
	ret

which has smaller code size and register pressure.

Ok for trunk?

Johann

	* config/avr/avr.md (*addhi3_zero_extend): Add alternative where
	REGNO($0) == REGNO($1).
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