[PATCH] Fix ICEs with power8 fixuns_trunc<mode>di2 patterns (PR target/79197)

[Segher Boessenkool]

On Tue, Jan 31, 2017 at 09:11:11AM +0100, Jakub Jelinek wrote:
> What I think this patch doesn't handle properly is SFmode -> DImode
> unsigned_fix.  I have no idea how SFmode is represented in vector registers,
> so have no idea if xscvdpuxds actually handles SFmode as well.

All floating point scalars are stored as DFmode in dword 0 in the VSRs.
This includes the "legacy" floating point registers: those _are_ dword 0
of VSRs 0 to 31.

All floating point scalar instructions handle both SFmode and DFmode.
The difference between "DP" and "SP" insns is how the end result is
rounded (and thus how flags are set, exceptions thrown, etc.)


Segher