[AArch64] Fix some define_insn_and_split conditions

Richard Sandiford richard.sandiford@linaro.org
Tue Dec 5 14:29:00 GMT 2017


The split conditions for aarch64_simd_bsldi_internal and
aarch64_simd_bsldi_alt were:

  "&& GP_REGNUM_P (REGNO (operands[0]))"

But since they (deliberately) can be split before reload, the operand
matched by register_operand can be a SUBREG rather than a REG.  This
triggered a boostrap failure building libgcc with rtl checking enabled.

While checking other define_insn_and_splits for the same thing,
I noticed a couple of SIMD ones were missing the leading "&&",
meaning that they would trigger even without TARGET_SIMD.  That
shouldn't matter in practice, since combine should never end up
generating matching rtl, but...

Tested on aarch64-linux-gnu.  OK to install?

Thanks,
Richard


2017-12-05  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/aarch64/aarch64-simd.md (aarch64_simd_bsldi_internal)
	(aarch64_simd_bsldi_alt): Check REG_P before GP_REGNUM_P.
	(aarch64_cm<optab>di, aarch64_cmtstdi): Add leading "&&" to
	split condition.

Index: gcc/config/aarch64/aarch64-simd.md
===================================================================
--- gcc/config/aarch64/aarch64-simd.md	2017-12-05 14:24:52.474015293 +0000
+++ gcc/config/aarch64/aarch64-simd.md	2017-12-05 14:25:28.128170629 +0000
@@ -2484,7 +2484,7 @@ (define_insn_and_split "aarch64_simd_bsl
   bit\\t%0.8b, %2.8b, %1.8b
   bif\\t%0.8b, %3.8b, %1.8b
   #"
-  "&& GP_REGNUM_P (REGNO (operands[0]))"
+  "&& REG_P (operands[0]) && GP_REGNUM_P (REGNO (operands[0]))"
   [(match_dup 1) (match_dup 1) (match_dup 2) (match_dup 3)]
 {
   /* Split back to individual operations.  If we're before reload, and
@@ -2526,7 +2526,7 @@ (define_insn_and_split "aarch64_simd_bsl
   bit\\t%0.8b, %3.8b, %1.8b
   bif\\t%0.8b, %2.8b, %1.8b
   #"
-  "&& GP_REGNUM_P (REGNO (operands[0]))"
+  "&& REG_P (operands[0]) && GP_REGNUM_P (REGNO (operands[0]))"
   [(match_dup 0) (match_dup 1) (match_dup 2) (match_dup 3)]
 {
   /* Split back to individual operations.  If we're before reload, and
@@ -4453,7 +4453,7 @@ (define_insn_and_split "aarch64_cm<optab
      (clobber (reg:CC CC_REGNUM))]
   "TARGET_SIMD"
   "#"
-  "reload_completed"
+  "&& reload_completed"
   [(set (match_operand:DI 0 "register_operand")
 	(neg:DI
 	  (COMPARISONS:DI
@@ -4516,7 +4516,7 @@ (define_insn_and_split "aarch64_cm<optab
     (clobber (reg:CC CC_REGNUM))]
   "TARGET_SIMD"
   "#"
-  "reload_completed"
+  "&& reload_completed"
   [(set (match_operand:DI 0 "register_operand")
 	(neg:DI
 	  (UCOMPARISONS:DI
@@ -4587,7 +4587,7 @@ (define_insn_and_split "aarch64_cmtstdi"
     (clobber (reg:CC CC_REGNUM))]
   "TARGET_SIMD"
   "#"
-  "reload_completed"
+  "&& reload_completed"
   [(set (match_operand:DI 0 "register_operand")
 	(neg:DI
 	  (ne:DI



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