[PATCH VECT]Swap operands for cond_reduction when necessary

Richard Biener richard.guenther@gmail.com
Fri Oct 28 12:38:00 GMT 2016


On Wed, Oct 26, 2016 at 6:42 PM, Bin Cheng <Bin.Cheng@arm.com> wrote:
> Hi,
> For stmt defining reduction, GCC vectorizer assumes that the reduction variable is always the last (second) operand.  Another fact is that vectorizer doesn't swap operands for cond_reduction during analysis stage.  The problem is GCC middle-end may canonicalize cond_expr into a form that reduction variable is not the last one.  At the moment, such case cannot be vectorized.
> The patch fixes this issue by swapping operands in cond_reduction when it's necessary.  The patch also swaps it back if vectorization fails.  The patch resolves failures introduced by previous match.pd patches.  In addition, couple cases are XPASSed on AArch64 now, which means more loops are vectorized.  I will send following patch addressing those XPASS tests.
> Bootstrap and test on x86_64 and AArch64 ongoing, is it OK?

@@ -1225,6 +1225,20 @@ destroy_loop_vec_info (loop_vec_info
loop_vinfo, bool clean_stmts)
                swap_ssa_operands (stmt,
                                   gimple_assign_rhs1_ptr (stmt),
                                   gimple_assign_rhs2_ptr (stmt));
+             else if (code == COND_EXPR
+                      && CONSTANT_CLASS_P (gimple_assign_rhs2 (stmt)))
+               {
+                 tree cond_expr = gimple_assign_rhs1 (stmt);
+                 enum tree_code cond_code = TREE_CODE (cond_expr);
+
+                 gcc_assert (TREE_CODE_CLASS (cond_code) == tcc_comparison);
+                 /* HONOR_NANS doesn't matter when inverting it back.  */

I think this doesn't hold true for COND_EXPRs that were originally
this way as canonicalization
is also inhibited by this.  I suggest to simply not invert back when
cond_code == ERROR_MARK
as we can't possibly have swapped it to the current non-canonical way.

Ok with that change.

Thanks,
Richard.

+                 cond_code = invert_tree_comparison (cond_code, false);
+                 gcc_assert (cond_code != ERROR_MARK);
+                 TREE_SET_CODE (cond_expr, cond_code);
+                 swap_ssa_operands (stmt, gimple_assign_rhs2_ptr (stmt),
+                                    gimple_assign_rhs3_ptr (stmt));


> Thanks,
> bin
>
> 2016-10-25  Bin Cheng  <bin.cheng@arm.com>
>
>         * tree-vect-loop.c (destroy_loop_vec_info): Handle cond_expr.
>         (vect_is_simple_reduction): Swap cond_reduction by inversion.



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