[rs6000] Add support for signed overflow arithmetic

Eric Botcazou ebotcazou@adacore.com
Mon Oct 24 09:54:00 GMT 2016


> mcrxr does not exist anymore.  It is not implemented in any IBM non-embedded
> CPU since POWER4.  PA6T does not have it either.  In some versions of the
> 2.0x ISA it does exist, but only in the optional "embedded" category.

Yes, it exists in all (public) versions of the unified 2.0x ISA.

> Linux emulates mcrxr, but that is very slow.  You could use mfxer, but
> that is a slow instruction as well (it is microcoded).

So there is no efficient way of accessing the OV flag in recent non-embedded 
CPUs (except for the new mcrxrx instruction in the 3.0 version)?

> That may work better.  It also may be better if you expose the OV bit
> as a separate reg (just like we have CA), instead of putting two machine
> insns in each template.

Yes, although CA can be seen as behaving like a register to some extent, but 
OV far less so IMO.

-- 
Eric Botcazou



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