[PATCH] xtensa: add HW FPU sequences for DIV/SQRT/RECIP/RSQRT

augustine.sterling@gmail.com augustine.sterling@gmail.com
Tue Oct 18 18:22:00 GMT 2016


On Fri, Oct 14, 2016 at 12:14 PM, Max Filippov <jcmvbkbc@gmail.com> wrote:
>
> Use new FPU instruction sequences documented in the ISA book to
> implement __divsf3, __divdf3, __recipsf2, __recipdf2, __rsqrtsf2,
> __rsqrtdf2 and __ieee754_sqrtf and __ieee754_sqrt.
>
> 2013-02-12  Ding-Kai Chen  <dkchen@cadence.com>
> libgcc/
>         * config/xtensa/ieee754-df.S (__recipdf2, __rsqrtdf2,
>         __ieee754_sqrt): New functions.
>         (__divdf3): Add implementation with new FPU instructions under
>         #if XCHAL_HAVE_DFP_DIV.
>         * config/xtensa/ieee754-sf.S (__recipsf2, __rsqrtsf2,
>         __ieee754_sqrtf): New functions.
>         (__divsf3): Add implementation with new FPU instructions under
>         #if XCHAL_HAVE_FP_DIV.
>         * config/xtensa/t-xtensa (LIB1ASMFUNCS): Add _sqrtf, _recipsf2
>         _rsqrtsf2, _sqrt, _recipdf2 and _rsqrtdf2


Approved, please apply.



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