[PATCH/AARCH64] Fix some testcases for AARCH64 ILP32
Andrew Pinski
pinskia@gmail.com
Mon Oct 17 18:06:00 GMT 2016
On Mon, Oct 17, 2016 at 2:55 AM, Richard Earnshaw (lists)
<Richard.Earnshaw@arm.com> wrote:
> On 16/10/16 22:39, Andrew Pinski wrote:
>> Hi,
>> These testcases use long for 64bit integer which means they will
>> fail with -mabi=ilp32 on aarch64. This reduces the number of failures
>> down for ILP32.
>>
>> OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions
>> (including with a multi-lib for ilp32).
>>
>> Thanks,
>> Andrew Pinski
>>
>> testsuite/ChangeLog:
>> * gcc.dg/tree-ssa/sra-17.c: Use long long instead of long.
>> * gcc.dg/tree-ssa/sra-18.c: Likewise.
>
> This changes the behaviour for these two tests on ARM, which is a 32-bit
> target. What testing other than aarch64 have you done? I'd like to
> see testing results for both 32-bit and 64-bit (including non-arm) systems.
>
>> * gcc.target/aarch64/aapcs64/test_align-7.c: Likewise.
>> * gcc.target/aarch64/cinc_common_1.c: Likewise.
>> * gcc.target/aarch64/combine_bfi_1.c: Likewise.
>> * gcc.target/aarch64/fmul_fcvt_1.c: Likewise.
>> * gcc.target/aarch64/mult-synth_4.c: Likewise.
>> * gcc.target/aarch64/pr68102_1.c: Likewise.
>> * gcc.target/aarch64/target_attr_3.c: Likewise.
>
> These are OK.
I committed the gcc.target changes and will be looking into
sra-17/sra-18 issue later this week.
Thanks,
Andrew
>
>>
>>
>> fixsometestcases.diff.txt
>>
>>
>> Index: testsuite/gcc.dg/tree-ssa/sra-17.c
>> ===================================================================
>> --- testsuite/gcc.dg/tree-ssa/sra-17.c (revision 241217)
>> +++ testsuite/gcc.dg/tree-ssa/sra-17.c (working copy)
>> @@ -7,7 +7,7 @@ extern void abort (void);
>> int
>> main (int argc, char **argv)
>> {
>> - long a[4] = { 7, 19, 11, 255 };
>> + long long a[4] = { 7, 19, 11, 255 };
>> int tot = 0;
>> for (int i = 0; i < 4; i++)
>> tot = (tot*256) + a[i];
>> Index: testsuite/gcc.dg/tree-ssa/sra-18.c
>> ===================================================================
>> --- testsuite/gcc.dg/tree-ssa/sra-18.c (revision 241217)
>> +++ testsuite/gcc.dg/tree-ssa/sra-18.c (working copy)
>> @@ -3,7 +3,7 @@
>> /* { dg-additional-options "-mcpu=ev4" { target alpha*-*-* } } */
>>
>> extern void abort (void);
>> -struct foo { long x; };
>> +struct foo { long long x; };
>>
>> struct bar { struct foo f[2]; };
>>
>> Index: testsuite/gcc.target/aarch64/aapcs64/test_align-7.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/aapcs64/test_align-7.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/aapcs64/test_align-7.c (working copy)
>> @@ -7,8 +7,8 @@
>>
>> struct s
>> {
>> - long x;
>> - long y;
>> + long long x;
>> + long long y;
>> };
>>
>> /* This still has size 16, so is still passed by value. */
>> Index: testsuite/gcc.target/aarch64/cinc_common_1.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/cinc_common_1.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/cinc_common_1.c (working copy)
>> @@ -15,14 +15,14 @@ barsi (int x)
>> return x > 100 ? x + 4 : x + 3;
>> }
>>
>> -long
>> -foodi (long x)
>> +long long
>> +foodi (long long x)
>> {
>> return x > 100 ? x - 2 : x - 1;
>> }
>>
>> -long
>> -bardi (long x)
>> +long long
>> +bardi (long long x)
>> {
>> return x > 100 ? x + 4 : x + 3;
>> }
>> Index: testsuite/gcc.target/aarch64/combine_bfi_1.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/combine_bfi_1.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/combine_bfi_1.c (working copy)
>> @@ -25,8 +25,8 @@ f4 (int x, int y)
>> return (x & ~0xff) | (y & 0xff);
>> }
>>
>> -long
>> -f5 (long x, long y)
>> +long long
>> +f5 (long long x, long long y)
>> {
>> return (x & ~0xffffffffull) | (y & 0xffffffff);
>> }
>> Index: testsuite/gcc.target/aarch64/fmul_fcvt_1.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/fmul_fcvt_1.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/fmul_fcvt_1.c (working copy)
>> @@ -27,13 +27,13 @@ ulsffoo##__a (float x) \
>> }
>>
>> #define FUNC_DEFD(__a) \
>> -long \
>> +long long \
>> dffoo##__a (double x) \
>> { \
>> return x * __a##.0; \
>> } \
>> \
>> -unsigned long \
>> +unsigned long long \
>> udffoo##__a (double x) \
>> { \
>> return x * __a##.0; \
>> @@ -101,18 +101,18 @@ do \
>> __builtin_abort (); \
>> if (usffoo##__a (__b) != (unsigned int)(__b * __a)) \
>> __builtin_abort (); \
>> - if (lsffoo##__a (__b) != (long)(__b * __a)) \
>> + if (lsffoo##__a (__b) != (long long)(__b * __a)) \
>> __builtin_abort (); \
>> - if (ulsffoo##__a (__b) != (unsigned long)(__b * __a)) \
>> + if (ulsffoo##__a (__b) != (unsigned long long)(__b * __a)) \
>> __builtin_abort (); \
>> } while (0)
>>
>> #define FUNC_TESTD(__a, __b) \
>> do \
>> { \
>> - if (dffoo##__a (__b) != (long)(__b * __a)) \
>> + if (dffoo##__a (__b) != (long long)(__b * __a)) \
>> __builtin_abort (); \
>> - if (udffoo##__a (__b) != (unsigned long)(__b * __a)) \
>> + if (udffoo##__a (__b) != (unsigned long long)(__b * __a)) \
>> __builtin_abort (); \
>> if (sdffoo##__a (__b) != (int)(__b * __a)) \
>> __builtin_abort (); \
>> Index: testsuite/gcc.target/aarch64/mult-synth_4.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/mult-synth_4.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/mult-synth_4.c (working copy)
>> @@ -1,10 +1,10 @@
>> /* { dg-do compile } */
>> /* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
>>
>> -long
>> +long long
>> foo (int x, int y)
>> {
>> - return (long)x * 6L;
>> + return (long long)x * 6LL;
>> }
>>
>> /* { dg-final { scan-assembler-times "smull\tx\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */
>> Index: testsuite/gcc.target/aarch64/pr68102_1.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/pr68102_1.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/pr68102_1.c (working copy)
>> @@ -3,7 +3,7 @@
>>
>> typedef __Float64x1_t float64x1_t;
>>
>> -typedef long int64_t;
>> +typedef long long int64_t;
>>
>> extern int64_t bar (float64x1_t f);
>>
>> Index: testsuite/gcc.target/aarch64/target_attr_3.c
>> ===================================================================
>> --- testsuite/gcc.target/aarch64/target_attr_3.c (revision 241217)
>> +++ testsuite/gcc.target/aarch64/target_attr_3.c (working copy)
>> @@ -5,12 +5,12 @@
>> and the fix is applied once. */
>>
>> __attribute__ ((target ("fix-cortex-a53-835769")))
>> -unsigned long
>> -test (unsigned long a, double b, unsigned long c,
>> - unsigned long d, unsigned long *e)
>> +unsigned long long
>> +test (unsigned long long a, double b, unsigned long long c,
>> + unsigned long long d, unsigned long long *e)
>> {
>> double result;
>> - volatile unsigned long tmp = *e;
>> + volatile unsigned long long tmp = *e;
>> __asm__ __volatile ("// %0, %1"
>> : "=w" (result)
>> : "0" (b)
>> @@ -18,12 +18,12 @@ test (unsigned long a, double b, unsigne
>> return c * d + d;
>> }
>>
>> -unsigned long
>> -test2 (unsigned long a, double b, unsigned long c,
>> - unsigned long d, unsigned long *e)
>> +unsigned long long
>> +test2 (unsigned long long a, double b, unsigned long long c,
>> + unsigned long long d, unsigned long long *e)
>> {
>> double result;
>> - volatile unsigned long tmp = *e;
>> + volatile unsigned long long tmp = *e;
>> __asm__ __volatile ("// %0, %1"
>> : "=w" (result)
>> : "0" (b)
>>
>
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