[PATCH, ARM 4/7, ping] Adapt atomic compare and swap to ARMv8-M Baseline

Thomas Preudhomme thomas.preudhomme@foss.arm.com
Mon Oct 3 16:45:00 GMT 2016


Ping?

Best regards,

Thomas

On 22/09/16 14:46, Thomas Preudhomme wrote:
> Hi,
>
> This patch is part of a patch series to add support for atomic operations on
> ARMv8-M Baseline targets in GCC. This specific patch makes the necessary change
> for compare and swap to work for ARMv8-M Baseline, doubleword integers excepted.
> Namely, it adds Thumb-1 specific constraints to compare_and_swap. The
> constraints are chosen so that once the pattern is splitted, the individual
> instructions have their constraints respected. In particular, the constraints
> for the cbranchsi4_* pattern must be duplicated here, which explains the use of
> several alternatives.
>
> Note: changes to enable other atomic operation are in the next patch of the series.
>
> ChangeLog entry is as follows:
>
> *** gcc/ChangeLog ***
>
> 2016-07-05  Thomas Preud'homme  <thomas.preudhomme@arm.com>
>
>         * config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
>         Baseline only alternatives to (i) hold store atomic success value in a
>         return register rather than a scratch register, (ii) use a low register
>         for it and to (iii) ensure the cbranchsi insn generated by the split
>         respect the constraints of Thumb-1 cbranchsi4_insn and
>         cbranchsi4_scratch.
>         * config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
>         constraints must match those in atomic_compare_and_swap.
>         (cbranchsi4_scratch): Likewise.
>
>
> Testing: No code generation difference for ARMv7-A, ARMv7VE and ARMv8-A on all
> atomic and synchronization testcases in the testsuite [2]. Patchset was also
> bootstrapped with --enable-itm --enable-gomp on ARMv8-A in ARM and Thumb mode at
> optimization level -O1 and above [1] without any regression in the testsuite and
> no code generation difference in libitm and libgomp.
>
> Code generation for ARMv8-M Baseline has been manually examined and compared
> against ARMv8-A Thumb-2 for the following configuration without finding any issue:
>
> gcc.dg/atomic-op-2.c at -Os
> gcc.dg/atomic-compare-exchange-2.c at -Os
> gcc.dg/atomic-compare-exchange-3.c at -O3
>
>
> Is this ok for trunk?
>
> Best regards,
>
> Thomas
>
> [1] CFLAGS_FOR_TARGET and CXXFLAGS_FOR_TARGET were set to "-O1 -g", "-O3 -g" and
> undefined ("-O2 -g")
> [2] The exact list is:
>
> gcc/testsuite/gcc.dg/atomic-compare-exchange-1.c
> gcc/testsuite/gcc.dg/atomic-compare-exchange-2.c
> gcc/testsuite/gcc.dg/atomic-compare-exchange-3.c
> gcc/testsuite/gcc.dg/atomic-exchange-1.c
> gcc/testsuite/gcc.dg/atomic-exchange-2.c
> gcc/testsuite/gcc.dg/atomic-exchange-3.c
> gcc/testsuite/gcc.dg/atomic-fence.c
> gcc/testsuite/gcc.dg/atomic-flag.c
> gcc/testsuite/gcc.dg/atomic-generic.c
> gcc/testsuite/gcc.dg/atomic-generic-aux.c
> gcc/testsuite/gcc.dg/atomic-invalid-2.c
> gcc/testsuite/gcc.dg/atomic-load-1.c
> gcc/testsuite/gcc.dg/atomic-load-2.c
> gcc/testsuite/gcc.dg/atomic-load-3.c
> gcc/testsuite/gcc.dg/atomic-lockfree.c
> gcc/testsuite/gcc.dg/atomic-lockfree-aux.c
> gcc/testsuite/gcc.dg/atomic-noinline.c
> gcc/testsuite/gcc.dg/atomic-noinline-aux.c
> gcc/testsuite/gcc.dg/atomic-op-1.c
> gcc/testsuite/gcc.dg/atomic-op-2.c
> gcc/testsuite/gcc.dg/atomic-op-3.c
> gcc/testsuite/gcc.dg/atomic-op-6.c
> gcc/testsuite/gcc.dg/atomic-store-1.c
> gcc/testsuite/gcc.dg/atomic-store-2.c
> gcc/testsuite/gcc.dg/atomic-store-3.c
> gcc/testsuite/g++.dg/ext/atomic-1.C
> gcc/testsuite/g++.dg/ext/atomic-2.C
> gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire.c
> gcc/testsuite/gcc.target/arm/atomic-op-acq_rel.c
> gcc/testsuite/gcc.target/arm/atomic-op-acquire.c
> gcc/testsuite/gcc.target/arm/atomic-op-char.c
> gcc/testsuite/gcc.target/arm/atomic-op-consume.c
> gcc/testsuite/gcc.target/arm/atomic-op-int.c
> gcc/testsuite/gcc.target/arm/atomic-op-relaxed.c
> gcc/testsuite/gcc.target/arm/atomic-op-release.c
> gcc/testsuite/gcc.target/arm/atomic-op-seq_cst.c
> gcc/testsuite/gcc.target/arm/atomic-op-short.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c
> gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c
> gcc/testsuite/gcc.target/arm/sync-1.c
> gcc/testsuite/gcc.target/arm/synchronize.c
> gcc/testsuite/gcc.target/arm/armv8-sync-comp-swap.c
> gcc/testsuite/gcc.target/arm/armv8-sync-op-acquire.c
> gcc/testsuite/gcc.target/arm/armv8-sync-op-full.c
> gcc/testsuite/gcc.target/arm/armv8-sync-op-release.c
> libstdc++-v3/testsuite/29_atomics/atomic/60658.cc
> libstdc++-v3/testsuite/29_atomics/atomic/62259.cc
> libstdc++-v3/testsuite/29_atomics/atomic/64658.cc
> libstdc++-v3/testsuite/29_atomics/atomic/65147.cc
> libstdc++-v3/testsuite/29_atomics/atomic/65913.cc
> libstdc++-v3/testsuite/29_atomics/atomic/70766.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/49445.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/constexpr.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/copy_list.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/default.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/direct_list.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/single_value.cc
> libstdc++-v3/testsuite/29_atomics/atomic/cons/user_pod.cc
> libstdc++-v3/testsuite/29_atomics/atomic/operators/51811.cc
> libstdc++-v3/testsuite/29_atomics/atomic/operators/56011.cc
> libstdc++-v3/testsuite/29_atomics/atomic/operators/integral_assignment.cc
> libstdc++-v3/testsuite/29_atomics/atomic/operators/integral_conversion.cc
> libstdc++-v3/testsuite/29_atomics/atomic/operators/pointer_partial_void.cc
> libstdc++-v3/testsuite/29_atomics/atomic/requirements/base_classes.cc
> libstdc++-v3/testsuite/29_atomics/atomic/requirements/compare_exchange_lowering.cc
> libstdc++-v3/testsuite/29_atomics/atomic/requirements/explicit_instantiation/1.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/clear/1.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/1.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/56012.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/aggregate.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/cons/default.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/requirements/standard_layout.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/requirements/trivial.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/explicit.cc
> libstdc++-v3/testsuite/29_atomics/atomic_flag/test_and_set/implicit.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/60940.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/65147.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/cons/constexpr.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/cons/copy_list.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/cons/default.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/cons/direct_list.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/cons/single_value.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/operators/bitwise.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/operators/decrement.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/operators/increment.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/operators/integral_assignment.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/operators/integral_conversion.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/requirements/standard_layout.cc
> libstdc++-v3/testsuite/29_atomics/atomic_integral/requirements/trivial.cc
> libstdc++-v3/testsuite/29_atomics/headers/atomic/functions_std_c++0x.cc
> libstdc++-v3/testsuite/29_atomics/headers/atomic/macros.cc
> libstdc++-v3/testsuite/29_atomics/headers/atomic/types_std_c++0x.cc
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