[PATCH] combine: Improve change_zero_ext (fixes PR71847)

[Segher Boessenkool]

On Wed, Nov 23, 2016 at 04:58:22PM +0100, Georg-Johann Lay wrote:
> Hi, this causes an illegal code issue on avr.

Sorry about that.

[ snip ]

> Trying 19 -> 7:
> Failed to match this instruction:
> (set (reg:HI 45 [ x+3 ])
>     (zero_extend:HI (reg:QI 25 r25 [ x+3 ])))
> Successfully matched this instruction:
> (set (reg:HI 45 [ x+3 ])
>     (and:HI (reg:HI 25 r25)
>         (const_int 255 [0xff])))
> allowing combination of insns 19 and 7

> R25 is a 16-bit hard reg, but HImode (and larger) registers must start 
> at an even register number.

So why does the define_insn allow it?

Please open a PR so I don't lose track.

Thanks,


Segher