[PATCH][ARM] PR target/78439: Update movdi constraints for Cortex-A8 tuning to handle LDRD/STRD

[Ramana Radhakrishnan]

On Tue, Nov 22, 2016 at 9:57 AM, Kyrill Tkachov
<kyrylo.tkachov@foss.arm.com> wrote:
> Hi all,
>
> This PR is an ICE while bootstrapping GCC with Cortex-A8 tuning, which we
> also get from the default ARMv7-A tuning.
> The ldrd/strd peepholes were recently made more aggressive and in this case
> they transform:
> (insn 13 33 40 2 (set (mem/c:SI (plus:SI (reg/f:SI 11 fp)
>                 (const_int -28 [0xffffffffffffffe4])) [3 d.num_comps+0 S4
> A64])
>         (reg:SI 12 ip [orig:117 _20 ] [117])) "cp-demangle.c":32 632
> {*arm_movsi_vfp}
>      (expr_list:REG_DEAD (reg:SI 12 ip [orig:117 _20 ] [117])
>         (nil)))
> (insn 40 13 39 2 (set (mem/f/c:SI (plus:SI (reg/f:SI 11 fp)
>                 (const_int -24 [0xffffffffffffffe8])) [2 d.subs+0 S4 A32])
>         (reg/f:SI 13 sp)) "cp-demangle.c":51 632 {*arm_movsi_vfp}
>      (nil))
>
> into:
> (insn 68 33 39 2 (set (mem/c:DI (plus:SI (reg/f:SI 11 fp)
>                 (const_int -28 [0xffffffffffffffe4])) [3 d.num_comps+0 S8
> A64])
>         (reg:DI 12 ip)) "cp-demangle.c":51 -1
>      (nil))
>
> This is okay, but the *movdi_vfp_cortexa8 pattern doesn't deal with the IP
> being the source
> of the store. The reason is that when the LDRD/STRD peepholes and machinery
> was introduced back in r197530
> it created the 'q' constraint which should be used for the register operands
> of the DImode stores and loads
> ('q' means CORE_REGS when LDRD/STRD is enabled in ARM mode and GENERAL_REGS
> otherwise). That revision
> updated the movdi_vfp pattern to use it in alternatives 4,5,6 but neglected
> to udpate the Cortex-A8-specific
> pattern. This is a sign that we should perhaps get rid of this special-cased
> pattern at some point, but for now
> this simple patch updates the appropriate alternatives to use the 'q'
> constraint so that output_move_double
> can output the correct LDRD/STRD instruction.
>
> Bootstrapped on arm-none-linux-gnueabihf with --with-arch=armv7-a that
> exercises this code (bootstrap currently fails
> without this patch) and tested with /-mtune=cortex-a8.
>
> Ok for trunk?

Ok.

Ramana
>
> Thanks,
> Kyrill
>
> 2016-11-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>     PR target/78439
>     * config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
>     register operand in alternatives 4,5,6.
>
> 2016-11-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
>
>     PR target/78439
>     * gcc.c-torture/compile/pr78439.c: New test.