[PATCH][PR rtl-optimization/69307] Handle hard registers in modes that span more than one register properly

[Andrey Belevantsev]

Hello,

On 12.03.2016 20:13, Jeff Law wrote:
>
> As Andrey outlined in the PR, selective-scheduling was missing a check &
> handling of hard registers in modes that span more than one hard reg. This
> caused an incorrect register selection during renaming.
>
> I verified removing the printf call from the test would not compromise the
> test.  Then I did a normal x86 bootstrap & regression test with the patch.
> Of course that's essentially useless, so I also did another bootstrap and
> regression test with -fselective-scheduling in BOOT_CFLAGS with and without
> this patch.  In both cases there were no regressions.
>
> I'm installing Andrey's patch on the trunk.  I'm not sure this is worth
> addressing in gcc-5.

I've looked at the patch again and as it fixes general code and has a 
regression marker I've included it in the bunch of other PRs that were 
backported to gcc-5.  I forgot you were hesitant putting it to gcc-5 though 
:) So I can revert it from the branch if you want me to.

Andrey

>
> Jeff