[PATCH], Pr 71667, Fix PowerPC ISA 3.0 DImode Altivec load/store

Michael Meissner meissner@linux.vnet.ibm.com
Tue Jun 28 18:21:00 GMT 2016

On Tue, Jun 28, 2016 at 12:49:12PM -0500, Segher Boessenkool wrote:
> On Tue, Jun 28, 2016 at 01:27:45PM -0400, Michael Meissner wrote:
> <snip>
> Thanks for the explanation.
> > I think the thing to do is create yet another memory constraint, that is just
> > an offsetable address, with the bottom 2 bits 0, and no PRE_MODIFY, etc.
> That sounds best yes.  The current patch seemed fragile and a bit
> confusing / surprising to me, but you now found an actual problem as
> well.
> > > 20599 lines, can you minimize this a bit?  If not, maybe we should just
> > > do without testcase here.
> > 
> > I doubt I could minimize it, since it is only this one source so far that has
> > shown to be failure.  I can delete it if you prefer.
> Huge testcases for simple problems does not really scale.

But it is not a simple problem.  You need to have allocated a DImode to an
Altivec register, which typically means you would otherwise be spilling
registers because the GPRs and FPRs are used for other values.

But I will delete the test case, since we do build Spec 2006 quite often.

Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

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