[PATCH, testsuite]: Skip PR71488 testcases for non-sse4 targets

[Uros Bizjak]

2016-06-23  Uros Bizjak  <ubizjak@gmail.com>

    PR tree-optimization/71488
    * gcc.target/i386/i386.exp (check_effective_target_sse4): Move to ...
    * lib/target-supports.exp: ... here.
    (check_sse4_hw_available): New procedure.
    (check_effective_target_sse4_runtime): Ditto.
    * g++.dg/pr71488.C (dg-additional-options): Use -msse4 instead of
    -march=westmere for sse4_runtime targets.
    * gcc.dg/vect/vect-bool-cmp.c: Include "tree-vect.h".
    (dg-additional-options): Use for sse4_runtime targets.
    (main): Call check_vect ().
    (dg-final): Perform scan only for sse4_runtime targets.

Tested on x86_64-linux-gnu {,-m32} AVX target and SSE2-only target.

Committed to mainline SVN.

Uros.
-------------- next part --------------
Index: g++.dg/pr71488.C
===================================================================
--- g++.dg/pr71488.C	(revision 237733)
+++ g++.dg/pr71488.C	(working copy)
@@ -1,7 +1,7 @@
-// PR middle-end/71488
+// PR tree-optimization/71488
 // { dg-do run }
 // { dg-options "-O3 -std=c++11" }
-// { dg-additional-options "-march=westmere" { target i?86-*-* x86_64-*-* } }
+// { dg-additional-options "-msse4" { target sse4_runtime } }
 // { dg-require-effective-target c++11 }
 
 #include <valarray>
Index: gcc.dg/vect/vect-bool-cmp.c
===================================================================
--- gcc.dg/vect/vect-bool-cmp.c	(revision 237733)
+++ gcc.dg/vect/vect-bool-cmp.c	(working copy)
@@ -1,8 +1,10 @@
-/* PR71488 */
+/* PR tree-optimization/71488 */
 /* { dg-require-effective-target vect_int } */
 /* { dg-require-effective-target vect_pack_trunc } */
-/* { dg-additional-options "-msse4" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-additional-options "-msse4" { target sse4_runtime } } */
 
+#include "tree-vect.h"
+
 int i1, i2;
 
 void __attribute__((noclone,noinline))
@@ -199,6 +201,8 @@
   long long l2[32];
   int i;
 
+  check_vect ();
+
   for (i = 0; i < 32; i++)
     {
       l2[i] = i2[i] = s2[i] = i % 2;
@@ -249,4 +253,4 @@
   check (res, ne);
 }
 
-/* { dg-final { scan-tree-dump-times "VECTORIZED" 18 "vect" { target { i?86-*-* x86_64-*-* } } } } */
+/* { dg-final { scan-tree-dump-times "VECTORIZED" 18 "vect" { target sse4_runtime } } } */
Index: gcc.target/i386/i386.exp
===================================================================
--- gcc.target/i386/i386.exp	(revision 237733)
+++ gcc.target/i386/i386.exp	(working copy)
@@ -76,20 +76,6 @@
     } "-O2 -mssse3" ]
 }
 
-# Return 1 if sse4 instructions can be compiled.
-proc check_effective_target_sse4 { } {
-    return [check_no_compiler_messages sse4.1 object {
-	typedef long long __m128i __attribute__ ((__vector_size__ (16)));
-	typedef int __v4si __attribute__ ((__vector_size__ (16)));
-
-	__m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
-	{
-	    return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
-						       (__v4si)__Y);
-	}
-    } "-O2 -msse4.1" ]
-}
-
 # Return 1 if aes instructions can be compiled.
 proc check_effective_target_aes { } {
     return [check_no_compiler_messages aes object {
Index: lib/target-supports.exp
===================================================================
--- lib/target-supports.exp	(revision 237733)
+++ lib/target-supports.exp	(working copy)
@@ -1608,6 +1608,29 @@
     }]
 }
 
+# Return 1 if the target supports executing SSE4 instructions, 0
+# otherwise.  Cache the result.
+
+proc check_sse4_hw_available { } {
+    return [check_cached_effective_target sse4_hw_available {
+	# If this is not the right target then we can skip the test.
+	if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
+	    expr 0
+	} else {
+	    check_runtime_nocache sse4_hw_available {
+		#include "cpuid.h"
+		int main ()
+		{
+		  unsigned int eax, ebx, ecx, edx;
+		  if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
+		    return !(ecx & bit_SSE4_2);
+		  return 1;
+		}
+	    } ""
+	}
+    }]
+}
+
 # Return 1 if the target supports executing AVX instructions, 0
 # otherwise.  Cache the result.
 
@@ -1654,6 +1677,17 @@
     return 0
 }
 
+# Return 1 if the target supports running SSE4 executables, 0 otherwise.
+
+proc check_effective_target_sse4_runtime { } {
+    if { [check_effective_target_sse4]
+	 && [check_sse4_hw_available]
+	 && [check_sse_os_support_available] } {
+	return 1
+    }
+    return 0
+}
+
 # Return 1 if the target supports running AVX executables, 0 otherwise.
 
 proc check_effective_target_avx_runtime { } {
@@ -6390,6 +6424,20 @@
     } "-O2 -msse2" ]
 }
 
+# Return 1 if sse4.1 instructions can be compiled.
+proc check_effective_target_sse4 { } {
+    return [check_no_compiler_messages sse4.1 object {
+	typedef long long __m128i __attribute__ ((__vector_size__ (16)));
+	typedef int __v4si __attribute__ ((__vector_size__ (16)));
+
+	__m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
+	{
+	    return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
+						       (__v4si)__Y);
+	}
+    } "-O2 -msse4.1" ]
+}
+
 # Return 1 if F16C instructions can be compiled.
 
 proc check_effective_target_f16c { } {