[PATCH], PowerPC: Allow DImode in Altivec registers

Segher Boessenkool segher@kernel.crashing.org
Tue Jun 14 22:54:00 GMT 2016


On Mon, Jun 13, 2016 at 02:29:41PM -0400, Michael Meissner wrote:
> It would help if I included the patch.

:-)

> > Are these changes ok to install in the trunk?  Assuming they go in the trunk,
> > can I install them in the 6.2 branch if they cause no regression?

Okay for trunk.  Okay for 6 after a week.

> > Note, I will be away from the office, starting Thursday afternoon (June 16th,
> > 2016) and I will return on Monday (June 20th, 2016).  I will not have easy
> > access to email during this time.

If big problems show up, we can always revert the patch ;-)

A few things...

> 	* config/rs6000/rs6000.md (lfiwax): Update clobbers that don't use
> 	direct move to use wi and now wj.

s/now/not/

> +;; wB needs ISA 2.07 VUPKHSW
> +(define_constraint "wB"
> +  "Signed 5-bit constant integer that can be loaded into an altivec register."
> +  (and (match_code "const_int")
> +       (and (match_test "TARGET_P8_VECTOR")
> +	    (match_operand 0 "s5bit_cint_operand"))))

"and" takes as many operands as you want, i.e.

+  (and (match_code "const_int")
+       (match_test "TARGET_P8_VECTOR")
+       (match_operand 0 "s5bit_cint_operand")))

>  (define_insn "*movdi_internal32"
> -  [(set (match_operand:DI 0 "rs6000_nonimmediate_operand" "=Y,r,r,?m,?*d,?*d,r")
> -	(match_operand:DI 1 "input_operand" "r,Y,r,d,m,d,IJKnGHF"))]
> +  [(set (match_operand:DI 0 "rs6000_nonimmediate_operand"
> +         "=Y,        r,         r,         ?m,        ?*d,        ?*d,
> +          r,         ?Y,        ?Z,        ?*wb,      ?*wv,       ?wi,
> +          ?wo,       ?wo,       ?wv,       ?wi,       ?wi,        ?wv,
> +          ?wv")
> +
> +	(match_operand:DI 1 "input_operand"
> +          "r,        Y,         r,         d,         m,          d,
> +           IJKnGHF,  wb,        wv,        Y,         Z,          wi,

"n" includes "IJK" already?

>  ; Some DImode loads are best done as a load of -1 followed by a mask
>  ; instruction.
>  (define_split
> -  [(set (match_operand:DI 0 "gpc_reg_operand")
> +  [(set (match_operand:DI 0 "int_reg_operand_not_pseudo")

Not sure what this is for...  If you want to say this split is only to
be done after RA, just say that explicitly in the split condition (i.e.
"reload_completed").  Or does this mean something else?


Segher



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