[PATCH] Improve *vec_concatv4si

[Uros Bizjak]

On Thu, May 26, 2016 at 7:07 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> Hi!
>
> Both vpunpcklqdq and vmovhps are available with XMM EVEX args in AVX512VL.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2016-05-26  Jakub Jelinek  <jakub@redhat.com>
>
>         * config/i386/sse.md (*vec_concatv4si): Use v=v,v instead of
>         x=x,x and v=v,m instead of x=x,m.
>
>         * gcc.target/i386/avx512vl-concatv4si-1.c: New test.

OK.

Thanks,
Uros.

> --- gcc/config/i386/sse.md.jj   2016-05-26 14:22:26.000000000 +0200
> +++ gcc/config/i386/sse.md      2016-05-26 15:37:40.029856077 +0200
> @@ -13386,10 +13386,10 @@ (define_insn "*vec_concatv2si"
>     (set_attr "mode" "TI,TI,DI,V4SF,SF,DI,DI")])
>
>  (define_insn "*vec_concatv4si"
> -  [(set (match_operand:V4SI 0 "register_operand"       "=x,x,x,x,x")
> +  [(set (match_operand:V4SI 0 "register_operand"       "=x,v,x,x,v")
>         (vec_concat:V4SI
> -         (match_operand:V2SI 1 "register_operand"     " 0,x,0,0,x")
> -         (match_operand:V2SI 2 "nonimmediate_operand" " x,x,x,m,m")))]
> +         (match_operand:V2SI 1 "register_operand"     " 0,v,0,0,v")
> +         (match_operand:V2SI 2 "nonimmediate_operand" " x,v,x,m,m")))]
>    "TARGET_SSE"
>    "@
>     punpcklqdq\t{%2, %0|%0, %2}
> @@ -13399,7 +13399,7 @@ (define_insn "*vec_concatv4si"
>     vmovhps\t{%2, %1, %0|%0, %1, %q2}"
>    [(set_attr "isa" "sse2_noavx,avx,noavx,noavx,avx")
>     (set_attr "type" "sselog,sselog,ssemov,ssemov,ssemov")
> -   (set_attr "prefix" "orig,vex,orig,orig,vex")
> +   (set_attr "prefix" "orig,maybe_evex,orig,orig,maybe_evex")
>     (set_attr "mode" "TI,TI,V4SF,V2SF,V2SF")])
>
>  ;; movd instead of movq is required to handle broken assemblers.
> --- gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c.jj    2016-05-26 15:45:13.978880684 +0200
> +++ gcc/testsuite/gcc.target/i386/avx512vl-concatv4si-1.c       2016-05-26 15:46:27.643911021 +0200
> @@ -0,0 +1,23 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-O2 -mavx512vl" } */
> +
> +typedef int V __attribute__((vector_size (8)));
> +typedef int W __attribute__((vector_size (16)));
> +
> +void
> +f1 (V x, V y)
> +{
> +  register W c __asm ("xmm16");
> +  c = (W) { x[0], x[1], x[0], x[1] };
> +  asm volatile ("" : "+v" (c));
> +}
> +
> +void
> +f2 (V x, V *y)
> +{
> +  register W c __asm ("xmm16");
> +  c = (W) { x[0], x[1], (*y)[0], (*y)[1] };
> +  asm volatile ("" : "+v" (c));
> +}
> +
> +/* { dg-final { scan-assembler-times "vpunpcklqdq\[^\n\r]*xmm16" 2 } } */
>
>         Jakub