[PATCH, testsuite/ARM] Enable atomic tests in gcc.dg for -march=armv8-a bare metal

[Kyrill Tkachov]

I see gcc-patches was not cc'ed on the original submission and I didn't CC it myself
in my reply, so here it is a resend with my reply...

On 31/05/16 14:11, Thomas Preudhomme wrote:
 > Hi,
 >
 > sync_char_short and sync_int_long used to restrict platform running
 > gcc.dg/atomic* tests are only true for ARM when targetting Linux. However,
 > ARMv8-A brought atomic instructions support so these tests could be run on
 > bare metal ARMv8-A targets.
 >
 > This patch define these two effective target to be true for ARM when the
 > platform supports lda* and stl* instructions.
 >
 > ChangeLog entry is as follows:
 >
 >
 > *** gcc/ChangeLog ***
 >
 > 2016-05-26  Thomas Preud'homme <thomas.preudhomme@arm.com>
 >
 >          * doc/sourcebuild.texi (arm_acq_rel): Document new effective target.
 >
 >
 > *** gcc/testsuite/ChangeLog ***
 >
 > 2016-05-26  Thomas Preud'homme <thomas.preudhomme@arm.com>
 >
 >          * lib/target-supports.exp (check_effective_target_arm_acq_rel): New
 >          procedure.


Have you confirmed that the tests that now become enabled
for bare-metal pass on an arm-none-eabi test run with -march=armv8-a?
If so, this is ok with the typo fixes below. Please resend the patch
you intend to commit to gcc-patches for archival purposes.

Thanks,
Kyrill

 >
 > See patch in attachment.
 >
 > Is this ok for trunk?
 >
 > Best regards,
 >
 > Thomas

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 72a7c020d6d25ffe152d9618281c2be632b57a27..25a50784d1e6ff075d2de345953d74ca1378856f 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1597,6 +1597,9 @@ ARM target supports executing ARMv8.1 Adv.SIMD instructions.  Some
  multilibs may be incompatible with the options needed.  Implies
  arm_v8_1a_neon_ok.

+@item arm_acq_rel
+ARM target supports acquire-release instructions.
+
  @item arm_prefer_ldrd_strd
  ARM target prefers @code{LDRD} and @code{STRD} instructions over
  @code{LDM} and @code{STM} instructions.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 127af0a1f33bebb0ecc6aa8587d992e89524ce6e..3bfb0b5bee98a09fbc731a1eb7feb7b5eb709746 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3528,6 +3528,25 @@ proc check_effective_target_arm_neonv2 { } {
      }
  }

+# Return 1 if this is an ARM target with load acquire and store release for
+# 8-, 16- and 32-byte types.
+


s/store release/store release instructions/

s/byte/bit/.


  +proc check_effective_target_arm_acq_rel { } {
+    return [check_no_compiler_messages arm_acq_rel object {
+    void
+    load_acquire_store_release (void)
+    {
+      asm ("lda r0, [r1]\n\t"
+           "stl r0, [r1]\n\t"
+           "ldah r0, [r1]\n\t"
+           "stlh r0, [r1]\n\t"
+           "ldab r0, [r1]\n\t"
+           "stlb r0, [r1]"
+           : : : "r0", "memory");
+    }
+    }]
+}
+
  # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
  # the Loongson vector modes.

@@ -5759,6 +5778,8 @@ proc check_effective_target_sync_int_long { } {
           || [istarget aarch64*-*-*]
           || [istarget alpha*-*-*]
           || [istarget arm*-*-linux-*]
+         || ([istarget arm*-*-*]
+         && [check_effective_target_arm_acq_rel])
           || [istarget bfin*-*linux*]
           || [istarget hppa*-*linux*]
           || [istarget s390*-*-*]
@@ -5792,6 +5813,8 @@ proc check_effective_target_sync_char_short { } {
           || [istarget i?86-*-*] || [istarget x86_64-*-*]
           || [istarget alpha*-*-*]
           || [istarget arm*-*-linux-*]
+         || ([istarget arm*-*-*]
+         && [check_effective_target_arm_acq_rel])
           || [istarget hppa*-*linux*]
           || [istarget s390*-*-*]
           || [istarget powerpc*-*-*]