[PATCH, libgcc/ARM 1/6] Fix Thumb-1 only == ARMv6-M & Thumb-2 only == ARMv7-M assumptions

Ramana Radhakrishnan ramana.gcc@googlemail.com
Wed Jun 1 09:01:00 GMT 2016


>
> diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
> index fd999dd..0d23f39 100644
> --- a/gcc/config/arm/arm.h
> +++ b/gcc/config/arm/arm.h
> @@ -2182,8 +2182,10 @@ extern int making_const_table;
>  #define TARGET_ARM_ARCH        \
>    (arm_base_arch)      \
>
> -#define TARGET_ARM_V6M (!arm_arch_notm && !arm_arch_thumb2)
> -#define TARGET_ARM_V7M (!arm_arch_notm && arm_arch_thumb2)
> +#define TARGET_ARM_V6M (TARGET_ARM_ARCH == BASE_ARCH_6M && !arm_arch_notm \
> +                       && !arm_arch_thumb2)
> +#define TARGET_ARM_V7M (TARGET_ARM_ARCH == BASE_ARCH_7M && !arm_arch_notm \
> +                       && arm_arch_thumb2)
>
>  /* The highest Thumb instruction set version supported by the chip.  */
>  #define TARGET_ARM_ARCH_ISA_THUMB              \
> diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h
> index 3795728..579a580 100644
> --- a/gcc/config/arm/elf.h
> +++ b/gcc/config/arm/elf.h
> @@ -148,8 +148,9 @@
>    while (0)
>
>  /* Horrible hack: We want to prevent some libgcc routines being included
> -   for some multilibs.  */
> -#ifndef __ARM_ARCH_6M__
> +   for some multilibs.  The condition should match the one in
> +   libgcc/config/arm/lib1funcs.S.  */
> +#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
>  #undef L_fixdfsi
>  #undef L_fixunsdfsi
>  #undef L_truncdfsf2
> diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
> index 4e349e9..3f96826 100644
> --- a/gcc/testsuite/lib/target-supports.exp
> +++ b/gcc/testsuite/lib/target-supports.exp
> @@ -3221,10 +3221,8 @@ proc check_effective_target_arm_cortex_m { } {
>         return 0
>      }
>      return [check_no_compiler_messages arm_cortex_m assembly {
> -       #if !defined(__ARM_ARCH_7M__) \
> -            && !defined (__ARM_ARCH_7EM__) \
> -            && !defined (__ARM_ARCH_6M__)
> -       #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
> +       #if defined(__ARM_ARCH_ISA_ARM)
> +       #error __ARM_ARCH_ISA_ARM is defined
>         #endif
>         int i;
>      } "-mthumb"]
> diff --git a/libgcc/config/arm/bpabi-v6m.S b/libgcc/config/arm/bpabi-v6m.S
> index a1e1640..9ae0bb8 100644
> --- a/libgcc/config/arm/bpabi-v6m.S
> +++ b/libgcc/config/arm/bpabi-v6m.S
> @@ -1,4 +1,4 @@
> -/* Miscellaneous BPABI functions.  ARMv6M implementation
> +/* Miscellaneous BPABI functions.  Thumb-1 only implementation

This is for Thumb-1 as in v4t, v6m and v8m.baseline like ISA variants
would be a better comment.

>
>     Copyright (C) 2006-2015 Free Software Foundation, Inc.
>     Contributed by CodeSourcery.
> diff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S
> index 252efcb..95a1f80 100644
> --- a/libgcc/config/arm/lib1funcs.S
> +++ b/libgcc/config/arm/lib1funcs.S
> @@ -124,7 +124,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
>       && !defined(__thumb2__)           \
>       && (!defined(__THUMB_INTERWORK__) \
>          || defined (__OPTIMIZE_SIZE__) \
> -        || defined(__ARM_ARCH_6M__)))
> +        || !__ARM_ARCH_ISA_ARM))
>  # define __prefer_thumb__
>  #endif

This is ok.

>
> @@ -305,7 +305,7 @@ LSYM(Lend_fde):
>
>  #ifdef __ARM_EABI__
>  .macro THUMB_LDIV0 name signed
> -#if defined(__ARM_ARCH_6M__)
> +#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1

I would prefer a separate pre-processor macro that is set when this
condition is true so that we don't have to check this in every single
instance.

#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
#define NOT_ISA_TARGET_32BIT
#endif



>         .ifc \signed, unsigned
>         cmp     r0, #0
>         beq     1f
> @@ -478,7 +478,7 @@ _L__\name:
>
>  #else /* !(__INTERWORKING_STUBS__ || __thumb2__) */
>
> -#ifdef __ARM_ARCH_6M__
> +#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>  #define EQUIV .thumb_set
>  #else
>  .macro ARM_FUNC_START name sp_section=
> @@ -510,7 +510,7 @@ SYM (__\name):
>  #endif
>  .endm
>
> -#ifndef __ARM_ARCH_6M__
> +#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
>  .macro ARM_FUNC_ALIAS new old
>         .globl  SYM (__\new)
>         EQUIV   SYM (__\new), SYM (__\old)
> @@ -1054,7 +1054,7 @@ ARM_FUNC_START aeabi_uidivmod
>  /* ------------------------------------------------------------------------ */
>  #ifdef L_umodsi3
>
> -#ifdef __ARM_ARCH_EXT_IDIV__
> +#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
>
>         ARM_FUNC_START umodsi3
>
> @@ -1240,7 +1240,7 @@ ARM_FUNC_START aeabi_idivmod
>  /* ------------------------------------------------------------------------ */
>  #ifdef L_modsi3
>
> -#if defined(__ARM_ARCH_EXT_IDIV__)
> +#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
>
>         ARM_FUNC_START modsi3
>
> @@ -1508,14 +1508,8 @@ LSYM(Lover12):
>
>  #endif /* __symbian__ */
>


>From here down to ....

> -#if ((__ARM_ARCH__ > 5) && !defined(__ARM_ARCH_6M__)) \
> -    || defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
> -    || defined(__ARM_ARCH_5TEJ__)
> -#define HAVE_ARM_CLZ 1
> -#endif
> -
>  #ifdef L_clzsi2
> -#if defined(__ARM_ARCH_6M__)
> +#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>  FUNC_START clzsi2
>         mov     r1, #28
>         mov     r3, #1
> @@ -1544,7 +1538,7 @@ FUNC_START clzsi2
>         FUNC_END clzsi2
>  #else
>  ARM_FUNC_START clzsi2
> -# if defined(HAVE_ARM_CLZ)
> +# if defined(__ARM_FEATURE_CLZ)
>         clz     r0, r0
>         RET
>  # else
> @@ -1568,15 +1562,15 @@ ARM_FUNC_START clzsi2
>  .align 2
>  1:
>  .byte 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0
> -# endif /* !HAVE_ARM_CLZ */
> +# endif /* !__ARM_FEATURE_CLZ */
>         FUNC_END clzsi2
>  #endif
>  #endif /* L_clzsi2 */
>
>  #ifdef L_clzdi2
> -#if !defined(HAVE_ARM_CLZ)
> +#if !defined(__ARM_FEATURE_CLZ)

here should be it's own little patchlet and can  go in separately.



>
> -# if defined(__ARM_ARCH_6M__)
> +# if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>  FUNC_START clzdi2
>         push    {r4, lr}
>  # else
> @@ -1601,14 +1595,14 @@ ARM_FUNC_START clzdi2
>         bl      __clzsi2
>  # endif
>  2:
> -# if defined(__ARM_ARCH_6M__)
> +# if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>         pop     {r4, pc}
>  # else
>         RETLDM  r4
>  # endif
>         FUNC_END clzdi2
>
> -#else /* HAVE_ARM_CLZ */
> +#else /* __ARM_FEATURE_CLZ */
>
>  ARM_FUNC_START clzdi2
>         cmp     xxh, #0
> @@ -1623,7 +1617,7 @@ ARM_FUNC_START clzdi2
>  #endif /* L_clzdi2 */
>
>  #ifdef L_ctzsi2
> -#if defined(__ARM_ARCH_6M__)
> +#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>  FUNC_START ctzsi2
>         neg     r1, r0
>         and     r0, r0, r1
> @@ -1656,7 +1650,7 @@ FUNC_START ctzsi2
>  ARM_FUNC_START ctzsi2
>         rsb     r1, r0, #0
>         and     r0, r0, r1


> -# if defined(HAVE_ARM_CLZ)
> +# if defined(__ARM_FEATURE_CLZ)
>         clz     r0, r0
>         rsb     r0, r0, #31
>         RET

This can go with the other __ARM_FEATURE_CLZ hunk too.

> @@ -1681,7 +1675,7 @@ ARM_FUNC_START ctzsi2
>  .align 2
>  1:
>  .byte  27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
> -# endif /* !HAVE_ARM_CLZ */
> +# endif /* !__ARM_FEATURE_CLZ */
>         FUNC_END ctzsi2
>  #endif
>  #endif /* L_clzsi2 */
> @@ -1738,7 +1732,7 @@ ARM_FUNC_START ctzsi2
>
>  /* Don't bother with the old interworking routines for Thumb-2.  */
>  /* ??? Maybe only omit these on "m" variants.  */
> -#if !defined(__thumb2__) && !defined(__ARM_ARCH_6M__)
> +#if !defined(__thumb2__) && __ARM_ARCH_ISA_ARM
>
>  #if defined L_interwork_call_via_rX
>
> @@ -1983,11 +1977,12 @@ LSYM(Lchange_\register):
>  .endm
>
>  #ifndef __symbian__
> -#ifndef __ARM_ARCH_6M__
> +/* The condition here must match the one in gcc/config/arm/elf.h.  */
> +#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
>  #include "ieee754-df.S"
>  #include "ieee754-sf.S"
>  #include "bpabi.S"
> -#else /* __ARM_ARCH_6M__ */
> +#else /* !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1 */
>  #include "bpabi-v6m.S"
> -#endif /* __ARM_ARCH_6M__ */
> +#endif /* !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1 */
>  #endif /* !__symbian__ */
> diff --git a/libgcc/config/arm/libunwind.S b/libgcc/config/arm/libunwind.S
> index cac1022..393ec8a 100644
> --- a/libgcc/config/arm/libunwind.S
> +++ b/libgcc/config/arm/libunwind.S
> @@ -58,7 +58,7 @@
>  #endif
>  #endif
>
> -#ifdef __ARM_ARCH_6M__
> +#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
>
>  /* r0 points to a 16-word block.  Upload these values to the actual core
>     state.  */
> @@ -169,7 +169,7 @@ FUNC_START gnu_Unwind_Save_WMMXC
>         UNPREFIX \name
>  .endm
>
> -#else /* !__ARM_ARCH_6M__ */
> +#else /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
>
>  /* r0 points to a 16-word block.  Upload these values to the actual core
>     state.  */
> @@ -351,7 +351,7 @@ ARM_FUNC_START gnu_Unwind_Save_WMMXC
>         UNPREFIX \name
>  .endm
>
> -#endif /* !__ARM_ARCH_6M__ */
> +#endif /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
>
>  UNWIND_WRAPPER _Unwind_RaiseException 1
>  UNWIND_WRAPPER _Unwind_Resume 1
> diff --git a/libgcc/config/arm/t-softfp b/libgcc/config/arm/t-softfp
> index 4ede438..554ec9b 100644
> --- a/libgcc/config/arm/t-softfp
> +++ b/libgcc/config/arm/t-softfp
> @@ -1,2 +1,2 @@
> -softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
> +softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
>  softfp_wrap_end := '\#endif'
>
>
> Tested by building libgcc and comparing it before and
> after with objdump -D and readelf -A for all permutations of:
>
>   Architectures:
>     armv4 armv4t armv5 armv5t armv5te armv6 armv6j armv6k
>     armv6z armv6kz armv6t2 armv6s-m armv7 armv7-a armv7ve
>     armv7-r armv7-m armv7e-m armv8-a armv8-a+crc iwmmxt
>     iwmmxt2
>
>   ISAs:
>     thumb arm
>
>   Optimization Levels:
>     Os O2
>
>   Excluding:
>     armv6s-m -marm
>     armv7-m -marm
>     armv7e-m -marm
>     iwmmxt -mthumb
>     iwmmxt2 -mthumb
>
> as being rejected by the compiler or assembler. ARMv6-m was not tested because compilation fails due to svc instruction.

Please fix up the macros, post back and redo the test. Otherwise this
is ok from a quick read.

Thanks for your patience and sorry about the delay in reviewing.

regards
Ramana

>
> Best regards,
>
> Thomas
>



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