[PATCH][RTL-ifcvt] PR rtl-optimization/68841: Make sure one basic block doesn't clobber CC reg usage of the other

[Kyrill Tkachov]

On 05/01/16 17:06, Kyrill Tkachov wrote:
>
> On 05/01/16 16:34, Bernd Schmidt wrote:
>> On 01/05/2016 03:22 PM, Kyrill Tkachov wrote:
>>>
>>> This works around the issue but we don't want to do perform the check
>>> for pairs of
>>> simple basic blocks because then we'll end up rejecting code that does
>>> things like:
>>> x = cond ? x + 1 : x - 1
>>> i.e. source of the set in both blocks reads and writes the same register.
>>> We can deal with this safely later on in the function since we rename
>>> the destinations
>>> of the two sets, so we don't want to reject this case here.
>>
>> So we need to teach bbs_ok_for_cmove_arith that this is going to happen. How about the approach below? Still seems to fix the issue, and it looks like the CC set is present in the df info so everything should work as intended. Right?
>>
>
> Yeah, this looks like it works.
> However, now we reject if-conversion whereas with my patch we still tried switching the order in which
> the blocks were emitted, which allowed for a bit more aggressive if-conversion.
> I don't know if this approach is overly restrictive yet.
> I'll try its effects on codegen quality on SPEC as soon as I get some cycles.
> But this approach does look appealing to me.
>

Hmm, from a first look at SPEC, it seems to still overly restrict ifconversion in the
x = cond ? x + 1 : x - 1 case.
I'll look deeper tomorrow as to what's going on there.

Kyrill

> Thanks for the help,
> Kyrill
>
>>
>> Bernd
>