[PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Uros Bizjak]

Hello!

> this patch enables AVX512 VPOPCNTD/VPOPCNTQ instructions recently
> added in Instruction Set Extensions
> (https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf).

@@ -265,6 +268,9 @@
 (define_mode_iterator VF_512
   [V16SF V8DF])

+(define_mode_iterator VI_AVX512F
+  [V16SI V8DI])

Please name this iterator VI_512.

@@ -19881,3 +19887,44 @@
    [(set_attr ("type") ("ssemuladd"))
     (set_attr ("prefix") ("evex"))
     (set_attr ("mode") ("TI"))])
+
+(define_insn "vpopcount<mode>"
+  [(set (match_operand:VI_AVX512F 0 "register_operand" "=v, v")
+ (popcount:VI_AVX512F
+  (match_operand:VI_AVX512F 1 "nonimmediate_operand" "v, m")))]
+  "TARGET_AVX512VPOPCNTDQ"
+  "vpopcnt<ssemodesuffix>\t{%1, %0|%0, %1}")
+
+(define_insn "vpopcountv16si_mask"
+  [(set (match_operand:V16SI 0 "register_operand" "=v, v")
+ (unspec:V16SI
+  [(match_operand:V16SI 1 "nonimmediate_operand" "v, m")
+   (match_operand:HI 2 "register_operand" "Yk, Yk")
+   (match_operand:V16SI 3 "nonimmediate_operand" "0, 0")] UNSPEC_VPOPCNTDQ))]
+  "TARGET_AVX512VPOPCNTDQ"
+  "vpopcntd\t{%1, %0%{%2%}|%{%2%}%0, %1}")
+
+(define_insn "vpopcountv16si_maskz"
+  [(set (match_operand:V16SI 0 "register_operand" "=v, v")
+ (unspec:V16SI
+  [(match_operand:HI 1 "register_operand" "Yk, Yk")
+   (match_operand:V16SI 2 "nonimmediate_operand" "v, m")] UNSPEC_VPOPCNTDQ))]
+  "TARGET_AVX512VPOPCNTDQ"
+  "vpopcntd\t{%2, %0%{%1%}%{z%}|%{%1%}%{z%}%0, %2}")
+
+(define_insn "vpopcountv8di_mask"
+  [(set (match_operand:V8DI 0 "register_operand" "=v, v")
+ (unspec:V8DI
+  [(match_operand:V8DI 1 "nonimmediate_operand" "v, m")
+   (match_operand:QI 2 "register_operand" "Yk, Yk")
+   (match_operand:V8DI 3 "nonimmediate_operand" "0, 0")] UNSPEC_VPOPCNTDQ))]
+  "TARGET_AVX512VPOPCNTDQ"
+  "vpopcntq\t{%1, %0%{%2%}|%{%2%}%0, %1}")
+
+(define_insn "vpopcountv8di_maskz"
+  [(set (match_operand:V8DI 0 "register_operand" "=v, v")
+ (unspec:V8DI
+  [(match_operand:QI 1 "register_operand" "Yk, Yk")
+   (match_operand:V8DI 2 "nonimmediate_operand" "v, m")] UNSPEC_VPOPCNTDQ))]
+  "TARGET_AVX512VPOPCNTDQ"
+  "vpopcntq\t{%2, %0%{%1%}%{z%}|%{%1%}%{z%}%0, %2}")

You should use (=v,vm) or (=v,vm,Yk) constraints. No need for separate
alternatives when they are handled in the same way.

Also, insn patterns with mask operands can use mode iterators. Use
avx512fmaskmode mode attribute for mask operand.

OTOH, the above patterns should probably use define_subst
infrastructure. Please see config/i386/subst.md for available
substitutions.

Uros.